Datasheet

 2013-2015 Microchip Technology Inc. DS00001987A-page 59

LAN8740A/LAN8740Ai

4.2 Control and Status Registers

Table 4-2 provides a list of supported registers. Register details, including bit definitions, are provided in the proceeding

subsections.

TABLE 4-2: SMI REGISTER MAP

(Decimal)

0 Basic Control Register Basic

1 Basic Status Register Basic

2 PHY Identifier 1 Register Extended

3 PHY Identifier 2 Register Extended

4 Auto Negotiation Advertisement Register Extended

5 Auto Negotiation Link Partner Ability Register Extended

6 Auto Negotiation Expansion Register Extended

7 Auto Negotiation Next Page TX Register Extended

8 Auto Negotiation Next Page RX Register Extended

13 MMD Access Control Register Extended

14 MMD Access Address/Data Register Extended

16 EDPD NLP/Crossover Time/EEE Configuration Register Vendor-specific

17 Mode Control/Status Register Vendor-specific

18 Special Modes Register Vendor-specific

24 TDR Patterns/Delay Control Register Vendor-specific

25 TDR Control/Status Register Vendor-specific

26 Symbol Error Counter Register Vendor-specific

27 Special Control/Status Indications Register Vendor-specific

28 Cable Length Register Vendor-specific

29 Interrupt Source Flag Register Vendor-specific

30 Interrupt Mask Register Vendor-specific

31 PHY Special Control/Status Register Vendor-specific