Datasheet

ManualsBrandsMicrochip ManualsIntegrated Circuits (ICs)TX Ethernet Transceiver Ethernet/MII/RMII VQFN 114mA

 2013-2015 Microchip Technology Inc. DS00001987A-page 13

LAN8740A/LAN8740Ai

TABLE 2-3: SERIAL MANAGEMENT INTERFACE (SMI) PINS

Num Pins Name Symbol Buffer Type Description

1SMI Data

Input/Output

MDIO VIS/

VO8

(PU)

Serial Management Interface data input/output

1 SMI Clock MDC VIS Serial Management Interface clock

TABLE 2-4: ETHERNET PINS

Num Pins Name Symbol Buffer Type Description

1 Ethernet

TX/RX Posi-

tive Channel

1

TXP AIO Transmit/Receive Positive Channel 1

1 Ethernet

TX/RX Nega-

tive Channel

1

TXN AIO Transmit/Receive Negative Channel 1

1 Ethernet

TX/RX Posi-

tive Channel

2

RXP AIO Transmit/Receive Positive Channel 2

1 Ethernet

TX/RX Nega-

tive Channel

2

RXN AIO Transmit/Receive Negative Channel 2

TABLE 2-5: MISCELLANEOUS PINS

Num Pins Name Symbol Buffer Type Description

1 External

Crystal

Input

XTAL1 ICLK External crystal input

External

Clock Input

CLKIN ICLK Single-ended clock oscillator input.

Note: When using a single ended clock

oscillator, XTAL2 should be left uncon-

nected.

1 External

Crystal Out-

put

XTAL2 OCLK External crystal output

1 External

Reset

nRST VIS

(PU)

System reset. This signal is active low.