Datasheet

LAN8740A/LAN8740Ai
DS00001987A-page 116 2013-2015 Microchip Technology Inc.
Note 1: This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down and pull-up resis-
tors add ±50 µA per-pin (typical).
Note 1: Measured at line side of transformer, line replaced by 100
(±1%) resistor.
2: Offset from 16 ns pulse width at 50% of pulse peak.
3: Measured differentially.
Note 1: Min/max voltages guaranteed as measured with 100 resistive load.
TABLE 5-5: VARIABLE I/O BUFFER CHARACTERISTICS
Parameter Symbol Min.
1.8 V
Typ.
2.5 V
Typ.
3.3 V
Typ.
Max. Unit Note
VIS Type Input Buffer
Low Input Level
High Input Level
Neg-Going Threshold
Pos-Going Threshold
Schmitt Trigger Hystere-
sis (V
IHT
- V
ILT
)
Input Leakage
(V
IN
= VSS or VDDIO)
Input Capacitance
V
ILI
V
IHI
V
ILT
V
IHT
V
HYS
I
IH
C
IN
-0.3
0.64
0.81
102
-10
0.83
0.99
158
1.15
1.29
136
1.41
1.65
138
3.6
1.76
1.90
288
10
2
V
V
V
V
mV
µA
pF
Schmitt trigger
Schmitt trigger
(see Note 1)
VO8 Type Buffers
Low Output Level
High Output Level
V
OL
V
OH
VDDIO - 0.4
0.4 V
V
I
OL
= 8 mA
I
OH
= -8 mA
VOD8 Type Buffer
Low Output Level V
OL
0.4 V I
OL
= 8 mA
TABLE 5-6: 100BASE-TX TRANSCEIVER CHARACTERISTICS
Parameter Symbol Min. Typ. Max. Unit Note
Peak Differential Output Voltage High V
PPH
950 - 1050 mVpk (see Note 1)
Peak Differential Output Voltage Low V
PPL
-950 - -1050 mVpk (see Note 1)
Signal Amplitude Symmetry V
SS
98 - 102 % (see Note 1)
Signal Rise and Fall Time T
RF
3.0 - 5.0 ns (see Note 1)
Rise and Fall Symmetry T
RFS
- - 0.5 ns (see Note 1)
Duty Cycle Distortion D
CD
35 50 65 % (see Note 2)
Overshoot and Undershoot V
OS
--5%
Jitter 1.4 ns (see Note 3)
TABLE 5-7: 10BASE-T TRANSCEIVER CHARACTERISTICS
Parameter Symbol Min. Typ. Max. Unit Note
Transmitter Peak Differential Output Voltage V
OUT
2.2 2.5 2.8 V (see Note 1)
Receiver Differential Squelch Threshold V
DS
300 420 585 mV