Datasheet

LAN8710A/LAN8710AI
DS00002164B-page 32 2016 Microchip Technology Inc.
3.7.4 REGOFF: INTERNAL +1.2V REGULATOR CONFIGURATION
The incorporation of flexPWR technology provides the ability to disable the internal +1.2V regulator. When the regulator
is disabled, an external +1.2V must be supplied to the VDDCR pin. Disabling the internal +1.2V regulator makes it pos
-
sible to reduce total system power, since an external switching regulator with greater efficiency (versus the internal linear
regulator) can be used to provide +1.2V to the transceiver circuitry.
Note: Because the REGOFF configuration strap shares functionality with the LED1 pin, proper consideration must
also be given to the LED polarity. Refer to
Section 3.8.1.1, "REGOFF and LED1 Polarity Selection," on
page 33 for additional information on the relation between REGOFF and the LED1 polarity.
3.7.4.1 Disabling the Internal +1.2V Regulator
To disable the +1.2V internal regulator, a pull-up strapping resistor should be connected from the REGOFF configuration
strap to VDD2A. At power-on, after both VDDIO and VDD2A are within specification, the transceiver will sample
REGOFF to determine whether the internal regulator should turn on. If the pin is sampled at a voltage greater than V
IH
,
then the internal regulator is disabled and the system must supply +1.2V to the VDDCR pin. The VDDIO voltage must
be at least 80% of the operating voltage level (1.44V when operating at 1.8V, 2.0V when operating at 2.5V, 2.64V when
operating at 3.3V) before voltage is applied to VDDCR. As described in
Section 3.7.4.2, when REGOFF is left floating
or connected to VSS, the internal regulator is enabled and the system is not required to supply +1.2V to the VDDCR pin.
3.7.4.2 Enabling the Internal +1.2V Regulator
The +1.2V for VDDCR is supplied by the on-chip regulator unless the transceiver is configured for the regulator off mode
using the
REGOFF configuration strap as described in Section 3.7.4.1. By default, the internal +1.2V regulator is
enabled when REGOFF is floating (due to the internal pull-down resistor). During power-on, if REGOFF is sampled
below V
IL
, then the internal +1.2V regulator will turn on and operate with power from the VDD2A pin.
3.7.5 NINTSEL: NINT/TXER/TXD4 CONFIGURATION
The nINT, TXER, and TXD4 functions share a common pin. There are two functional modes for this pin, the TXER/TXD4
mode and nINT (interrupt) mode. The
nINTSEL configuration strap is latched at POR and on the rising edge of the nRST.
By default, nINTSEL is configured for nINT mode via the internal pull-up resistor.
Note: Because the nINTSEL configuration strap shares functionality with the LED2 pin, proper consideration must
also be given to the LED polarity. Refer to Section 3.8.1.2, "nINTSEL and LED2 Polarity Selection," on
page 33 for additional information on the relation between nINTSEL and the LED2 polarity.
3.8 Miscellaneous Functions
3.8.1 LEDS
Two LED signals are provided as a convenient means to determine the transceiver's mode of operation. All LED signals
are either active high or active low as described in
Section 3.8.1.2, "nINTSEL and LED2 Polarity Selection" and Section
3.8.1.1, "REGOFF and LED1 Polarity Selection," on page 33.
The LED1 output is driven active whenever the device detects a valid link, and blinks when CRS is active (high) indicat-
ing activity.
The LED2 output is driven active when the operating speed is 100Mbps. This LED will go inactive when the operating
speed is 10Mbps or during line isolation.
Note: When pulling the LED1 and LED2 pins high, they must be tied to VDD2A, NOT VDDIO.