Datasheet

LAN8700/LAN8700i
DS00002260A-page 6  2007-2016 Microchip Technology Inc.
2.0 PIN CONFIGURATION
2.1 Package Pin-out Diagram and Signal Table
FIGURE 2-1: PACKAGE PINOUT (TOP VIEW)
nINT/TX_ER/TXD4
MDC
CRS/PHYAD4
MDIO
nRST
TX_EN
VDD_CORE
VDD33
TXD3
RX_CLK/REGOFF
TX_CLK
RX_ER/RXD4
VDDIO
TXD1
TXD0
TXD2
1
2
3
4
5
6
7
8
LAN8700/LAN8700i
MII/RMII Ethernet PHY
36 Pin QFN
GND FLAG
24
23
22
21
20
19SPEED100/PHYAD0 9RX_DV
27
26
25