Datasheet
2007-2016 Microchip Technology Inc. DS00002260A-page 59
LAN8700/LAN8700i
7.1.1.2.1 Air Discharge
To perform this test, a charged electrode is moved close to the system being tested until a spark is generated. This test
is difficult to reproduce because the discharge is influenced by such factors as humidity, the speed of approach of the
electrode, and construction of the test equipment.
7.1.1.2.2 Contact Discharge
The uncharged electrode first contacts the pin to prepare this test, and then the probe tip is energized. This yields more
repeatable results, and is the preferred test method. The independent test laboratories contracted by Microchip provide
test results for both types of discharge methods.
7.1.2 OPERATING CONDITIONS
7.1.3 POWER CONSUMPTION
7.1.3.1 Power Consumption Device Only
Power measurements taken over the operating conditions specified. See Section 5.4.5 for a description of the power
down modes.
Note 7-1 This is calculated with full flexPWR features activated: VDDIO = 1.8V and internal regulator disabled.
TABLE 7-3: RECOMMENDED OPERATING CONDITIONS
Parameter Conditions MIN TYP MAX Units Comment
VDD33 VDD33 to VSS 3.0 3.3 3.6 V
Input Voltage on Digital
Pins
0.0 VDDIO V
Voltage on Analog I/O
pins (RXP, RXN)
0.0 +3.6V V
Ambient Temperature T
A
LAN8700-AEZG 0 70 C For Commercial
Temperature
T
A
LAN8700i-AEZG -40 +85 C For Industrial Temperature
TABLE 7-4: POWER CONSUMPTION DEVICE ONLY
Power Pin Group
VDDA3.3
Power Pins
(mA)
VDD_CORE
Power Pin
(mA)
VDDIO
Power Pin
(mA)
Total
Current
(mA)
Total
Power
(mW)
100BASE-T /W TRAFFIC
Max 35.6 41.3 4.7 81.6 269.28
Typical 33.3 37.4 4.1 74.8 246.84
Min 31.3 33.4 1.3 66 165.75
Note 7-1
10BASE-T /W TRAFFIC
Max 15.6 22.3 1.1 39 128.7
Typical 15.3 20.8 0.9 37 122.1
Min 14.9 19.1 0.1 34.1 83.88
Note 7-1
ENERGY DETECT POWER
DOWN
Max 10.5 3.3 0.5 13.85 45.7
Typical 9.9 2.7 0.4 13.0 42.9
Min 9.8 2.3 0.3 12.4 37.02
Note 7-1
GENERAL POWER DOWN
Max 0.21 2.92 0.39 3.52 11.62
Typical 0.124 2.6 0.345 3.07 10.131
Min 0.038 2.1 0.3 2.44 4.4454
Note 7-1
Note: The current at VDD_CORE is either supplied by the internal regulator from current entering at VDD33, or
from an external 1.8V supply when the internal regulator is disabled.