Datasheet

 2007-2016 Microchip Technology Inc. DS00002260A-page 47

LAN8700/LAN8700i

110 Power Down mode. In this mode the PHY will wake-

up in Power-Down mode. The PHY cannot be used

when the MODE[2:0] bits are set to this mode. To exit

this mode, the MODE bits in Register 18.7:5 (see

Table 5-39) must be configured to some other value

and a soft reset must be issued.

N/A N/A

111 All capable. Auto-negotiation enabled. X10X 1111

TABLE 5-48: MODE[2:0] BUS (CONTINUED)

Mode [2:0] Mode Definitions

Default Register Bit Values

[13,12,10,8] [8,7,6,5]