Datasheet

LAN8700/LAN8700i

DS00002260A-page 34  2007-2016 Microchip Technology Inc.

5.1 SMI Register Mapping

The following registers are supported (register numbers are in decimal):

5.2 SMI Register Format

The mode key is as follows:

• RW = Read/write,

• SC = Self clearing,

• WO = Write only,

• RO = Read only,

• LH = Latch high, clear on read of register,

• LL = Latch low, clear on read of register,

• NASR = Not Affected by Software Reset

• X = Either a 1 or 0.

TABLE 5-29: SMI REGISTER MAPPING

0 Basic Control Register Basic

1 Basic Status Register Basic

2 PHY Identifier 1 Extended

3 PHY Identifier 2 Extended

4 Auto-Negotiation Advertisement Register Extended

5 Auto-Negotiation Link Partner Ability Register Extended

6 Auto-Negotiation Expansion Register Extended

16 Silicon Revision Register Vendor-specific

17 Mode Control/Status Register Vendor-specific

18 Special Modes Vendor-specific

20 Reserved Vendor-specific

21 Reserved Vendor-specific

22 Reserved Vendor-specific

23 Reserved Vendor-specific

26 Symbol Error Counter Register Vendor-specific

27 Control / Status Indication Register Vendor-specific

28 Special internal testability controls Vendor-specific

29 Interrupt Source Register Vendor-specific

30 Interrupt Mask Register Vendor-specific

31 PHY Special Control/Status Register Vendor-specific