Datasheet

 2016-2017 Microchip Technology Inc. DS00002117F-page 9
KSZ9031RNX
17
LED1/
PHYAD0/
PME_N1
I/O
LED1 output: Programmable LED1 output
Config mode: The voltage on this pin is sampled and latched during the
power-up/reset process to determine the value of PHYAD[0]. See the Strap-In
Options - KSZ9031RNX section for details.
PME_N output: Programmable PME_N output (pin option 1). This pin function
requires an external pull-up resistor to DVDDH (digital V
DD_I/O
) in a range
from 1.0 k to 4.7 k. When asserted low, this pin signals that a WOL event
has occurred.
This pin is not an open-drain for all operating modes.
The LED1 pin is programmed by the LED_MODE strapping option (Pin 41),
and is defined as follows:
Single-LED Mode
Activity Pin State LED Definition
No Activity H OFF
Activity (RX, TX) Toggle Blinking
Tri-Color Dual-LED Mode
Link/Activity
Pin State LED Definition
LED2 LED1 LED2 LED1
Link Off H H OFF OFF
1000 Link/No Activity L H ON OFF
1000 Link/Activity
(RX, TX)
Toggle H Blinking OFF
100 Link/No Activity H L OFF ON
100 Link/Activity
(RX, TX)
H Toggle OFF Blinking
10 Link/No Activity L L ON ON
10 Link/Activity
(RX, TX)
Toggle Toggle Blinking Blinking
For tri-color dual-LED mode, LED1 works in conjunction with LED2 (Pin 15) to
indicate 10 Mbps link and activity.
18 DVDDL P
1.2V digital V
DD
19 TXD0 I RGMII mode: RGMII TD0 (Transmit Data 0) input
20 TXD1 I RGMII mode: RGMII TD1 (Transmit Data 1) input
21 TXD2 I RGMII mode: RGMII TD2 (Transmit Data 2) input
22 TXD3 I RGMII mode: RGMII TD3 (Transmit Data 3) input
23 DVDDL P
1.2V digital V
DD
24 GTX_CLK I RGMII mode: RGMII TXC (Transmit Reference Clock) input
TABLE 2-1: SIGNALS - KSZ9031RNX (CONTINUED)
Pin
Number
Pin
Name
Type
Note
2-1
Description