Datasheet

KSZ9031RNX
DS00002117F-page 63  2016-2017 Microchip Technology Inc.
8.0 RESET CIRCUIT
The following are some reset circuit suggestions.
Figure 8-1 illustrates the reset circuit for powering up the KSZ9031RNX if reset is triggered by the power supply.
FIGURE 8-1: RESET CIRCUIT IF TRIGGERED BY THE POWER SUPPLY
Figure 8-2 illustrates the reset circuit for applications where reset is driven by another device (for example, the CPU or
an FPGA). At power-on-reset, R, C, and D1 provide the monotonic rise time to reset the KSZ9031RNX device. The
RST_OUT_N from the CPU/FPGA provides the warm reset after power-up.
The KSZ9031RNX and CPU/FPGA references the same digital I/O voltage (DVDDH).
FIGURE 8-2: RECOMMENDED RESET CIRCUIT FOR CPU/FPGA RESET OUTPUT
Figure 8-3 illustrates the reset circuit with an MIC826 voltage supervisor driving the KSZ9031RNX reset input.
DVDDH
D1: 1N4148
D1
R 10K
KSZ9031RNX
RESET_N
C 10µF
DVDDH
KSZ9031RNX
D1
R 10K
RESET_N
C 10µF
D2
CPU/FPGA
RST_OUT_N
D1, D2: 1N4148