Datasheet

KSZ9031RNX
DS00002117F-page 50  2016-2017 Microchip Technology Inc.
MMD Address 2h, Register 1Dh – Wake-On-LAN – Customized Packet, Type 0, Mask 1
MMD Address 2h, Register 21h – Wake-On-LAN – Customized Packet, Type 1, Mask 1
MMD Address 2h, Register 25h – Wake-On-LAN – Customized Packet, Type 2, Mask 1
MMD Address 2h, Register 29h – Wake-On-LAN – Customized Packet, Type 3, Mask 1
2.1D.15:0
2.21.15:0
2.25.15:0
2.29.15:0
Custom
Packet Type
X Mask 1
This register selects the bytes in the second 16
bytes of the packet (bytes 17 thru 32) that will be
used for CRC calculation.
For each bit in this register,
1 = Byte is selected for CRC calculation
0 = Byte is not selected for CRC calculation
The register-bit to packet-byte mapping is as fol-
lows:
Bit [15]: Byte 32
……
Bit [2]: Byte 18
Bit [0]: Byte 17
RW 0000_0000_0000_00
00
MMD Address 2h, Register 1Eh – Wake-On-LAN – Customized Packet, Type 0, Mask 2
MMD Address 2h, Register 22h – Wake-On-LAN – Customized Packet, Type 1, Mask 2
MMD Address 2h, Register 26h – Wake-On-LAN – Customized Packet, Type 2, Mask 2
MMD Address 2h, Register 2Ah – Wake-On-LAN – Customized Packet, Type 3, Mask 2
2.1E.15:0
2.22.15:0
2.26.15:0
2.2A.15:0
Custom
Packet Type
X Mask 2
This register selects the bytes in the third 16 bytes
of the packet (bytes 33 through 48) that will be
used for CRC calculation.
For each bit in this register,
1 = Byte is selected for CRC calculation
0 = Byte is not selected for CRC calculation
The register-bit to packet-byte mapping is as fol-
lows:
Bit [15]: Byte 48
……
Bit [2]: Byte 34
Bit [0]: Byte 33
RW 0000_0000_0000_00
00
MMD Address 2h, Register 1Fh – Wake-On-LAN – Customized Packet, Type 0, Mask 3
MMD Address 2h, Register 23h – Wake-On-LAN – Customized Packet, Type 1, Mask 3
MMD Address 2h, Register 27h – Wake-On-LAN – Customized Packet, Type 2, Mask 3
MMD Address 2h, Register 2Bh – Wake-On-LAN – Customized Packet, Type 3, Mask 3
2.1F.15:0
2.23.15:0
2.27.15:0
2.2B.15:0
Custom
Packet Type
X Mask 3
This register selects the bytes in the fourth 16 bytes
of the packet (bytes 49 through 64) that will be
used for CRC calculation.
For each bit in this register,
1 = Byte is selected for CRC calculation
0 = Byte is not selected for CRC calculation
The register-bit to packet-byte mapping is as fol-
lows:
Bit [15]: Byte 64
……
Bit [2]: Byte 50
Bit [0]: Byte 49
RW 0000_0000_0000_00
00
MMD Address 1Ch, Register 4h – Analog Control 4
1C.4.15:11 Reserved Reserved RW 0000_0
1C.4.10 10BASE-Te
Mode
1 = 10BASE-Te (1.75V TX amplitude)
0 = Standard 10BASE-T (2.5V TX amplitude)
RW 0
1C.4.9:0 Reserved Reserved RW 00_1111_1111
TABLE 4-6: MMD REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
Note 4-1
Default