Datasheet
2016-2017 Microchip Technology Inc. DS00002117F-page 5
KSZ9031RNX
2.0 PIN DESCRIPTION AND CONFIGURATION
FIGURE 2-1: 48-QFN PIN ASSIGNMENT (TOP VIEW)
1
TXRXP_A
LED2/
PHYAD1
4142434445464748
PADDLE GROUND
(ON BOTTOM OF CHIP)
37383940
2
TXRXM_A
3
4
5
AVDDL
6
AVDDH
7
8
9
10
TXRXP_B
11
TXRXM_B
AVDDL
2019181716151413 24232221
LED1 /
PME_N1 /
PHYAD0
DV
DD
H
TXD0
DVDDL
TXD2
TXD3
DVDDL
36
35
34
33
32
31
30
29
28
27
26
25
DVDDL
TX_EN
RXD1/
MODE1
RXD0/
MODE0
RX_DV/
CLK125_EN
DVDDH
VSS
RX_CLK/
PHYAD2
RESET_N
ISET
NC
XI
XO
AVDDL_PLL
LDO_O
DVDDH
CLK125_NDO/
LED_MODE
DVDDL
INT_N/
PME_N2
MDIO
TXD1
DVDDL
KSZ9031RNX
12
AVDDH
TXRXP_C
TXRXM_C
TXRXP_D
TXRXM_D
MDC
RXD2/
MODE2
RXD3/
MODE3
DVDDL
GTX_CLK
NC