Datasheet

 2016-2017 Microchip Technology Inc. DS00002117F-page 47
KSZ9031RNX
2.3.4 NAND Tree
Strap-In
Status
1 = Strap to NAND Tree mode RO Set by MODE[3:0]
strapping pin.
See the Strap-In
Options -
KSZ9031RNX
section for details.
2.3.3:0 Reserved Reserved RO 0000
MMD Address 2h, Register 4h – RGMII Control Signal Pad Skew
2.4.15:8 Reserved Reserved RW 0000_0000
2.4.7:4 RX_DV Pad
Skew
RGMII RX_CTL output pad skew control (0.06 ns/
step)
RW 0111
2.4.3:0 TX_EN Pad
Skew
RGMII TX_CTL input pad skew control (0.06 ns/
step)
RW 0111
MMD Address 2h, Register 5h – RGMII RX Data Pad Skew
2.5.15:12 RXD3 Pad
Skew
RGMII RXD3 output pad skew control (0.06 ns/
step)
RW 0111
2.5.11:8 RXD2 Pad
Skew
RGMII RXD2 output pad skew control (0.06 ns/
step)
RW 0111
2.5.7:4 RXD1 Pad
Skew
RGMII RXD1 output pad skew control (0.06 ns/
step)
RW 0111
2.5.3:0 RXD0 Pad
Skew
RGMII RXD0 output pad skew control (0.06 ns/
step)
RW 0111
MMD Address 2h, Register 6h – RGMII TX Data Pad Skew
2.6.15:12 TXD3 Pad
Skew
RGMII TXD3 input pad skew control (0.06 ns/step) RW 0111
2.6.11:8 TXD2 Pad
Skew
RGMII TXD2 input pad skew control (0.06 ns/step) RW 0111
2.6.7:4 TXD1 Pad
Skew
RGMII TXD1 input pad skew control (0.06 ns/step) RW 0111
2.6.3:0 TXD0 Pad
Skew
RGMII TXD0 input pad skew control (0.06 ns/step) RW 0111
MMD Address 2h, Register 8h – RGMII Clock Pad Skew
2.8.15:10 Reserved Reserved RW 0000_00
2.8.9:5 GTX_CLK
Pad Skew
RGMII GTX_CLK input pad skew control (0.06 ns/
step)
RW 01_111
2.8.4:0 RX_CLK
Pad Skew
RGMII RX_CLK output pad skew control (0.06 ns/
step)
RW 0_1111
TABLE 4-6: MMD REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
Note 4-1
Default