Datasheet

 2016-2017 Microchip Technology Inc. DS00002117F-page 37
KSZ9031RNX
8.15 Next Page 1 = Additional next pages will follow
0 = Last page
RO 0
8.14 Acknowledge 1 = Successful receipt of link word
0 = No successful receipt of link word
RO 0
8.13 Message
Page
1 = Message page
0 = Unformatted page
RO 0
8.12 Acknowl-
edge2
1 = Able to act on the information
0 = Not able to act on the information
RO 0
8.11 Toggle 1 = Previous value of transmitted link code word
equal to logic zero
0 = Previous value of transmitted link code word
equal to logic one
RO 0
8.10:0 Message
Field
— RO 000_0000_0000
Register 9h – 1000BASE-T Control
9.15:13 Test Mode
Bits
Transmitter test mode operations
[9.15:13] Mode
[000] Normal operation
[001] Test mode 1 –Transmit waveform test
[010] Test mode 2 –Transmit jitter test in master
mode
[011] Test mode 3 –Transmit jitter test in slave
mode
[100] Test mode 4 –Transmitter distortion test
[101] Reserved, operations not identified
[110] Reserved, operations not identified
[111] Reserved, operations not identified
To enable 1000BASE-T Test Mode:
1) Set Register 0h = 0x0140 to disable auto-negoti-
ation and select 1000 Mbps speed.
2) Set Register 9h, bits [15:13] = 001, 010, 011, or
100 to select one of the 1000BASE-T Test Modes.
After the above settings, the test waveform for the
selected test mode is transmitted onto each of the
4 differential pairs. No link partner is needed.
RW 000
9.12 Master-Slave
Manual Con-
figuration
Enable
1 = Enable master-slave manual configuration
value
0 = Disable master-slave manual configuration
value
RW 0
9.11 Master-Slave
Manual Con-
figuration
Value
1 = Configure PHY as master during master-slave
negotiation
0 = Configure PHY as slave during master-slave
negotiation
This bit is ignored if master-slave manual configu-
ration is disabled (Reg. 9.12 = 0).
RW 0
9.10 Port Type 1 = Indicate the preference to operate as multi-port
device (master)
0 = Indicate the preference to operate as single-
port device (slave)
This bit is valid only if master-slave manual config-
uration is disabled (Reg. 9.12 = 0).
RW 0
TABLE 4-3: IEEE-DEFINED REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
Note 4-1
Default