Datasheet

 2016-2017 Microchip Technology Inc. DS00002117F-page 29
KSZ9031RNX
3.17.3 LINK STATUS CHANGE DETECTION
If link status change detection is enabled, the KSZ9031RNX asserts its PME output pin low whenever there is a link
status change using the following MMD Address 2h registers bits and their enabled (1) or disabled (0) settings:
• MMD Address 2h, Register 10h, Bit [0] // For link-up detection
• MMD Address 2h, Register 10h, Bit [1] // For link-down detection
The PME output signal is available on either LED1/PME_N1 (Pin 17) or INT_N/PME_N2 (Pin 38), and is selected and
enabled using MMD Address 2h, Register 2h, Bits [8] and [10], respectively. Additionally, MMD Address 2h, Register
10h, Bits [15:14] defines the output functions for Pins 17 and 38.
The PME output is active low and requires a 1 k pull-up to the VDDIO supply. When asserted, the PME output is
cleared by disabling the register bit that enabled the PME trigger source (magic packet, customized packet, link status
change).
3.18 Typical Current/Power Consumption
Table 3-12, Table 3- 13 , Table 3-14, and Ta b le 3-15 show the typical current consumption by the core (DVDDL, AVDDL,
AVDDL_PLL), transceiver (AVDDH), and digital I/O (DVDDH) supply pins, and the total typical power for the entire
KSZ9031RNX device for various nominal operating voltage combinations.
TABLE 3-12: TYPICAL CURRENT/POWER CONSUMPTION
TRANSCEIVER (3.3V), DIGITAL I/O (3.3V)
Condition
1.2V Core
(DVDDL, AVDDL,
AVDDL_PLL)
3.3V Transceiver
(AVDDH)
3.3V Digital I/O
(DVDDH)
Total
Chip Power
1000BASE-T Link-Up (no traffic) 210 mA 67.4 mA 19.5 mA 538 mW
1000BASE-T Full-Duplex at
100% Utilization
221 mA 66.3 mA 41.5 mA 621 mW
100BASE-TX Link-Up (no traffic) 63.6 mA 28.7 mA 13.9 mA 217 mW
100BASE-TX Full-Duplex at
100% Utilization
63.8 mA 28.6 mA 17.2 mA 228 mW
10BASE-T Link-Up (no traffic) 7.1 mA 15.9 mA 11.5 mA 99 mW
10BASE-T Full-Duplex at
100% Utilization
7.7 mA 28.6 mA 13.7 mA 149 mW
Software Power-Down Mode
(Reg. 0h.11 = 1)
1.0 mA 4.2 mA 9.3 mA 46 mW
TABLE 3-13: TYPICAL CURRENT/POWER CONSUMPTION
TRANSCEIVER (3.3V), DIGITAL I/O (1.8V)
Condition
1.2V Core
(DVDDL, AVDDL,
AVDDL_PLL)
3.3V Transceiver
(AVDDH)
1.8V Digital I/O
(DVDDH)
Total
Chip Power
1000BASE-T Link-Up (no traffic) 210 mA 67.4 mA 11.2 mA 494 mW
1000BASE-T Full-Duplex at
100% Utilization
221 mA 66.3 mA 23.6 mA 526 mW
100BASE-TX Link-Up (no traffic) 63.6 mA 28.7 mA 8.4 mA 186 mW
100BASE-TX Full-Duplex at
100% Utilization
63.8 mA 28.6 mA 9.8 mA 189 mW
10BASE-T Link-Up (no traffic) 7.1 mA 15.9 mA 3.6 mA 67 mW
10BASE-T Full-Duplex at
100% Utilization
7.7 mA 28.6 mA 5.6 mA 114 mW
Software Power-Down Mode
(Reg. 0h.11 = 1)
1.0 mA 4.2 mA 5.5 mA 25 mW