Datasheet

 2016 Microchip Technology Inc. DS00002246A-page 81

KSZ8895MQX/RQX/FQX/MLX

Note 4-1 All port dropped packet MIB counters do not indicate overflow or validity; therefore the application

must keep track of overflow and valid conditions.

0x19 TxMulticastPkts

Tx good multicast packets (not including errored multicast packets or valid

broadcast packets).

0x1A TxUnicastPkts Tx good unicast packets.

0x1B TxDeferred

Tx packets by a port for which the 1st Tx attempt is delayed due to the busy

medium.

0x1C TxTotalCollision Tx total collision, half-duplex only.

0x1D TxExcessiveCollision A count of frames for which Tx fails due to excessive collisions.

0x1E TxSingleCollision

Successfully Tx frames on a port for which Tx is inhibited by exactly one colli-

sion.

0x1F TxMultipleCollision

Successfully Tx frames on a port for which Tx is inhibited by more than one

collision.

For Port 2, the base is 0x20, same offset definition (0x20-0x3f)

For Port 3, the base is 0x40, same offset definition (0x40-0x5f)

For Port 4, the base is 0x60, same offset definition (0x60-0x7f)

For Port 5, the base is 0x80, same offset definition (0x80-0x9f)

Format of Per Port MIB Counters (16 entries)

Address Name Description Mode Default

31 Overflow

1, Counter overflow.

0, No Counter overflow.

RO 0

30 Count Valid

1, Counter value is valid.

0, Counter value is not valid.

RO 0

29 - 0 Counter Values Counter value. RO 0

All Ports Dropped Packet MIB Counters

Offset Counter Name Description

0x100 Port1 Tx Drop Packets Tx packets dropped due to lack of resources.

0x101 Port2 Tx Drop Packets Tx packets dropped due to lack of resources.

0x102 Port3 Tx Drop Packets Tx packets dropped due to lack of resources.

0x103 Port4 Tx Drop Packets Tx packets dropped due to lack of resources.

0x104 Port5 Tx Drop Packets Tx packets dropped due to lack of resources.

0x105

Port1 Rx Drop

Packets