Datasheet
KSZ8895MQX/RQX/FQX/MLX
DS00002246A-page 70 2016 Microchip Technology Inc.
1
4 Queue Split
Enable
This bit in combination with Register 16/32/48/
64/80 bit 0 will select the split of 1/2/4 queues:
{Register177 bit 1, Register16 bit 0}=
11, reserved.
10, the port output queue is split into four priority
queues or if map 802.1p to priority 0-3 mode.
01, the port output queue is split into two priority
queues or if map 802.1p to priority 0-3 mode.
00, single output queue on the port. There is no
priority differentiation even though packets are
classified into high and low priority
R/W 0
0
Enable Drop-
ping Tag
0 = disable the drop received tagged packets
1 = enable the drop received tagged packets
R/W 0
Register 178 (0xB2): Port 1 Control 10
Register 194 (0xC2): Port 2 Control 10
Register 210 (0xD2): Port 3 Control 10
Register 226 (0xE2): Port 4 Control 10
Register 242 (0xF2): Port 5 Control 10
7
Enable Port
Transmit Queue
3 Ratio
0, strict priority, will transmit all the packets from
this priority queue 3 before transmit lower prior-
ity queue.
1, bit [6:0] reflect the packet number allow to
transmit from this priority queue 3 within a cer-
tain time
R/W 1
6 - 0
Port Transmit
Queue 3
Ratio[6:0]
Packet number for Transmit Queue 3 for highest
priority packets in four queues mode
R/W 0001000
Register 179 (0xB3): Port 1 Control 11
Register 195 (0xC3): Port 2 Control 11
Register 211 (0xD3): Port 3 Control 11
Register 227 (0xE3): Port 4 Control 11
Register 243 (0xF3): Port 5 Control 11
7
Enable Port
Transmit Queue
2 Ratio
0, strict priority, will transmit all the packets from
this priority queue 2 before transmit lower prior-
ity queue.
1, bit [6:0] reflect the packet number allow to
transmit from this priority queue 1 within a cer-
tain time
R/W 1
6 - 0
Port Transmit
Queue 2
Ratio[6:0]
Packet number for Transmit Queue 2 for high/
low priority packets in high/low priority packets
in four queues mode
R/W 0000100
Register 180 (0xB4): Port 1 Control 12
Register 196 (0xC4): Port 2 Control 12
Register 212 (0xD4): Port 3 Control 12
Register 228 (0xE4): Port 4 Control 12
Register 244 (0xF4): Port 5 Control 12
7
Enable Port
Transmit Queue
1 Rate
0, strict priority, will transmit all the packets from
this priority queue 1 before transmit lower prior-
ity queue.
1, bit [6:0] reflect the packet number allow to
transmit from this priority queue 1 within a cer-
tain time
R/W 1
TABLE 4-4: ADVANCED CONTROL REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description Mode Default