Datasheet
2016 Microchip Technology Inc. DS00002246A-page 59
KSZ8895MQX/RQX/FQX/MLX
5
Forced
Duplex
1, forced full-duplex if (1) AN is disabled or (2) AN
is enabled but failed.
0, forced half-duplex if (1) AN is disabled or (2) AN
is enabled but failed (Default).
R/W
0
For Port 3/Port 4 only.
Pins LED1_0/PCRS
strap option:
1). Force half-duplex
mode:
LED1_0 pin Pull-
up(1) (default) for
Port 3
PCRS pin Pull-down
(0) (default) for Port 4
2). Force full-Duplex
mode:
LED1_0 pin Pull-
down(0) for Port 3
PCRS Pull-up (1) for
Port 4.
Note: LED1_0 has
internal pull-up;
PCRS have internal
pull-down.
4
Advertised
Flow Control
Capability
1, advertise flow control capability.
0, suppress flow control capability from transmis-
sion to link partner.
R/W 1
3
Advertised
100BT Full-
Duplex
Capability
1, advertise 100BT full-duplex capability.
0, suppress 100BT full-duplex capability from
transmission to link partner.
R/W 1
2
Advertised
100BT Half-
Duplex
Capability
1, advertise 100BT half-duplex capability.
0, suppress 100BT half-duplex capability from
transmission to link partner.
R/W 1
1
Advertised
10BT Full-
Duplex
Capability
1, advertise 10BT full-duplex capability.
0, suppress 10BT full-duplex capability from trans-
mission to link partner.
R/W 1
0
Advertised
10BT Half-
Duplex
Capability
1, advertise 10BT half-duplex capability.
0, suppress 10BT half-duplex capability from trans-
mission to link partner.
R/W 1
Register 29 (0x1D): Port 1 Control 6
Register 45 (0x2D): Port 2 Control 6
Register 61 (0x3D): Port 3 Control 6
Register 77 (0x4D): Port 4 Control 6
Register 93 (0x5D): Port 5 Control 6
7 LED Off
1, turn off all port’s LEDs (LEDx_2, LEDx_1,
LEDx_0, where “x” is the port number). These pins
will be driven high if this bit is set to one.
0, normal operation.
R/W 0
6 Txids
1, disable port’s transmitter.
0, normal operation.
R/W 0
5Restart AN
1, restart auto-negotiation.
0, normal operation.
R/W
(SC)
0
4 FX Reserved N/A RO 0
TABLE 4-3: PORT REGISTERS (CONTINUED)
Address Name Description Mode Default