Datasheet
KSZ8895MQX/RQX/FQX/MLX
DS00002246A-page 54 2016 Microchip Technology Inc.
4.2 Port Registers
The following registers are used to enable features that are assigned on a per port basis. The register bit assignments
are the same for all ports, but the address for each port is different, as indicated.
TABLE 4-3: PORT REGISTERS
Address Name Description Mode Default
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
Register 64 (0x40): Port 4 Control 0
Register 80 (0x50): Port 5 Control 0
7
Broadcast
Storm
Protection
Enable
1, enable broadcast storm protection for ingress
packets on the port.
0, disable broadcast storm protection.
R/W 0
6
DiffServ Pri-
ority Classifi-
cation
Enable
1, enable DiffServ priority classification for ingress
packets on port.
0, disable DiffServ function.
R/W 0
5
802.1p Prior-
ity Classifica-
tion Enable
1, enable 802.1p priority classification for ingress
packets on port.
0, disable 802.1p.
R/W 0
4 - 3
Port-Based
Priority Clas-
sification
Enable
= 00, ingress packets on port will be classified as
priority 0 queue if “Diffserv” or “802.1p” classifica-
tion is not enabled or fails to classify.
= 01, ingress packets on port will be classified as
priority 1 queue if “Diffserv” or “802.1p” classifica-
tion is not enabled or fails to classify.
= 10, ingress packets on port will be classified as
priority 2 queue if “Diffserv” or “802.1p” classifica-
tion is not enabled or fails to classify.
= 11, ingress packets on port will be classified as
priority 3 queue if “Diffserv” or “802.1p” classifica-
tion is not enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be
enabled at the same time. The OR’ed result of
802.1p and DSCP overwrites the port priority.
R/W 00
2 Tag insertion
1, when packets are output on the port, the switch
will add 802.1q tags to packets without 802.1q tags
when received. The switch will not add tags to
packets already tagged. The tag inserted is the
ingress port’s “port VID.”
0, disable tag insertion.
R/W 0
1 Tag Removal
1, when packets are output on the port, the switch
will remove 802.1q tags from packets with 802.1q
tags when received. The switch will not modify
packets received without tags.
0, disable tag removal.
R/W 0