Datasheet
KSZ8895MQX/RQX/FQX/MLX
DS00002246A-page 50 2016 Microchip Technology Inc.
2
Huge Packet
Support
1, will accept packet sizes up to 1916 bytes (inclu-
sive). This bit setting will override setting from bit 1
of the same register.
0, the max packet size will be determined by bit 1 of
this register.
R/W 0
1
Legal
Maximum
Packet
Size Check
Disable
1, will accept packet sizes up to 1536 bytes (inclu-
sive).
0, 1522 bytes for tagged packets (not including
packets with STPID from CPU to ports 1-4), 1518
bytes for untagged packets. Any packets larger
than the specified value will be dropped.
R/W
0
Pin PMRXER strap
option.
PD(0): (default) 1518/
1522 byte packets.
PU(1): 1536 byte
packets.
Note: PMRXER has
internal pull-down.
0 Reserved N/A RO 0
Register 5 (0x05): Global Control 3
7
802.1q VLAN
Enable
1, 802.1q VLAN mode is turned on. VLAN table
needs to set up before the operation.
0, 802.1q VLAN is disabled.
R/W 0
6
IGMP Snoop
Enable on
Switch SW5-
MII/RMII
Interface
1, IGMP snoop enabled. All the IGMP packets will
be forwarded to Switch MII/RMII port.
0, IGMP snoop disabled.
R/W 0
5
Enable Direct
Mode on
Switch SW5-
MII/RMII
Interface
1, direct mode on Port 5. This is a special mode for
the Switch MII/RMII interface. Using preamble
before MRXDV to direct switch to forward packets,
bypassing internal look-up.
0, normal operation.
R/W 0
4
Enable Pre-
Tag on
Switch SW5-
MII/RMII
Interface
1, packets forwarded to Switch MII/RMII interface
will be pre-tagged with the source port number
(preamble before RXDV).
0, normal operation.
R/W 0
3 - 2 Reserved N/A RO 00
1
Enable “Tag”
Mask
1, the last 5 digits in the VID field are used as a
mask to determine which port(s) the packet should
be forwarded to.
0, no tag masks.
Note: you need to turn off the 802.1q VLAN mode
(reg0x5, bit 7 = 0) for this bit to work.
R/W 0
0
Sniff Mode
Select
1, will do Rx AND Tx sniff (both source port and
destination port need to match).
0, will do Rx OR Tx sniff (Either source port or des-
tination port needs to match).
This is the mode used to implement Rx only sniff.
R/W 0
Register 6 (0x06): Global Control 4
7
Switch SW5-
MII/RMII
Back
Pressure
Enable
1, enable half-duplex back pressure on switch MII/
RMII interface.
0, disable back pressure on switch MII/RMII inter-
face.
R/W 0
TABLE 4-2: GLOBAL REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description Mode Default