Datasheet
2016 Microchip Technology Inc. DS00002246A-page 17
KSZ8895MQX/RQX/FQX/MLX
The KSZ8895MQX/RQX/FQX/MLX can function as a managed switch or an unmanaged switch. If no EEPROM or
micro-controller exists, then the KSZ8895MQX/RQX/FQX/MLX will operate from its default setting. The strap-in option
pins can be configured by external pull-up/down resistors and take effect after power down reset or warm reset. The
functions are described in the table below.
TABLE 2-2: STRAP-IN OPTIONS - KSZ8895MQX/RQX/FQX/MLX
Pin Number Pin Name
Type,
Note 2-3
Description, Note 2-4
1MDI-XDISIPD
Disable auto MDI/MDI-X.
Strap option:
PD = (default) = normal operation.
PU = disable auto MDI/MDI-X on all ports.
62 PMRXD3 IPD/O
PHY [5] MII receive bit 3.
Strap option:
PD (default) = enable flow control;
PU = disable flow control.
63 PMRXD2 IPD/O
PHY [5] MII receive bit 2.
Strap option:
PD (default) = disable back pressure;
PU = enable back pressure.
64 PMRXD1 IPD/O
PHY [5] MII/RMII receive bit 1.
Strap option:
PD (default) = drop excessive collision packets;
PU = does not drop excessive collision packets.
65 PMRXD0 IPD/O
PHY [5] MII/RMII receive bit 0.
Strap option:
PD (default) = disable aggressive back-off algorithm in half-duplex
mode;
PU = enable for performance enhancement.
66 PMRXER IPD/O
PHY [5] MII/RMII receive error.
Strap option:
PD (default) = 1522/1518 bytes;
PU = packet size up to 1536 bytes.
67 PCRS IPD/O
PHY [5] MII carrier sense
Strap option for Port 4 only
PD (default) = force half-duplex if auto-negotiation is disabled or
fails.
PU = force full-duplex if auto-negotiation is disabled or fails. Refer to
Register 76.
68 PCOL IPD/O
PHY [5] MII collision detect
Strap option for Port 4 only.
PD (default) = no force flow control.
PU = force flow control. Refer to Register 66.
80 SMRXD3 IPD/O
Switch MII receive bit 3.
Strap option:
PD (default) = disable switch SW5-MII/RMII full-duplex flow control;
PU = enable switch SW5-MII/RMII full-duplex flow control.
81 SMRXD2 IPD/O
Switch MII receive bit 2.
Strap option:
PD (default) = switch SW5-MII/RMII in full-duplex mode;
PU = switch SW5-MII/RMII in half-duplex mode.
82 SMRXD1 IPD/O
Switch MII/RMII receive bit 1
Strap option:
PD (default) = switch SW5-MII/RMII in 100 Mbps mode.
PU = switch MII/RMII in 10 Mbps mode.