Datasheet

KSZ8873MLL/FLL/RLL
DS00002348A-page 82  2017 Microchip Technology Inc.
Note that data is only allowed to change during SCL low-time, except the start and stop bits.
TABLE 7-5: I
2
C TIMING PARAMETERS
Parameter Description Min. Typ. Max. Units
t
cyc
Clock cycle 400 — — ns
t
s
Setup time 33 — Half-
Cycle
ns
t
h
Hold time 0 — — ns
t
tbs
Start bit setup time 33 — — ns
t
tbh
Start bit hold time 33 — — ns
t
sbs
Stop bit setup time 2 — — ns
t
sbh
Stop bit hold time 33 — — ns
t
ov
Output valid 64 — 96 ns