Datasheet

KSZ8873MLL/FLL/RLL
DS00002348A-page 48 2017 Microchip Technology Inc.
3 Reserved RO
Reserved
Do not change the default values.
0
2-0
Unknown Packet
Default Port
R/W
Specify which port(s) to send packets with unknown
destination MAC addresses. This feature is enabled
by bit [7] of this register.
Bit 2 stands for port 3.
Bit 1 stands for port 2.
Bit 0 stands for port 1.
A ‘1’ includes a port.
A ‘0’ excludes a port.
111
Register 15 (0x0F): Global Control 13
7-3 PHY Address R/W
00000: N/A
00001: Port 1 PHY address is 0x1
00010: Port 1 PHY address is 0x2
11101: Port 1 PHY address is 0x29
11110: N/A
11111: N/A
Note:
Port 2 PHY address = (Port 1 PHY address) + 1
00001
2-0 Reserved RO
Reserved
Do not change the default values.
000
TABLE 4-6: GLOBAL REGISTERS (0-15) (CONTINUED)
Bit Name R/W Description Default