Datasheet

 2017 Microchip Technology Inc. DS00002348A-page 41
KSZ8873MLL/FLL/RLL
10 Pause RO Link partner pause capability 0
Reg. 30, bit 4
Reg. 46, bit 4
9 Reserved RO — 0 —
8 Adv 100 Full RO Link partner 100 full-duplex capability 0
Reg. 30, bit 3
Reg. 46, bit 3
7 Adv 100 Half RO Link partner 100 half-duplex capability 0
Reg. 30, bit 2
Reg. 46, bit 2
6 Adv 10 Full RO Link partner 10 full-duplex capability 0
Reg. 30, bit 1
Reg. 46, bit 1
5 Adv 10 Half RO Link partner 10 half-duplex capability 0
Reg. 30, bit 0
Reg. 46, bit 0
4-0 Reserved RO — 00000 —
PHY1 Register 29 (PHYAD = 0x1, REGAD = 0x1D): Not support
PHY2 Register 29 (PHYAD = 0x2, REGAD = 0x1D): LinkMD Control/Status
15 Vct_enable
R/W
(SC)
1 = Enable cable diagnostic. After VCT test
has completed, this bit will be self-cleared.
0 = Indicate cable diagnostic test (if enabled)
has completed and the status information is
valid for read.
0 Reg. 42, bit 4
14-13 Vct_result RO
00 = Normal condition
01 = Open condition detected in cable
10 = Short condition detected in cable
11 = Cable diagnostic test has failed
00 Reg 42, bit[6:5]
12
Vct 10M
Short
RO 1 = Less than 10 meter short 0 Reg. 42, bit 7
11-9 Reserved RO Reserved 000 —
8-0
Vct_-
fault_count
RO
Distance to the fault.
It’s approximately 0.4m*vct_fault_count[8:0]
{0, (0x00)}
{(Reg. 42, bit 0),
(Reg. 43,
bit[7:0])}
PHY1 Register 31 (PHYAD = 0x1, REGAD = 0x1F): PHY Special Control/Status
PHY2 Register 31 (PHYAD = 0x2, REGAD = 0x1F): PHY Special Control/Status
15-6 Reserved RO Reserved {(0x00),00} —
5Polrvs RO
1 = polarity is reversed
0 = polarity is not reversed
0
Reg. 31, bit 5
Reg. 47, bit 5
Note: This bit is
only valid for
10BT
4 MDI-X status RO
1 = MDI
0 = MDI-X
0
Reg. 30, bit 7
Reg. 46, bit 7
3 Force_lnk R/W
1 = Force link pass
0 = Normal Operation
0
Reg. 26, bit 3
Reg. 42, bit 3
2 Pwrsave R/W
0 = Enable power saving
1 = Disable power saving
1
Reg. 26, bit 2
Reg. 42, bit 2
TABLE 4-2: REGISTER DESCRIPTIONS (CONTINUED)
Bit Name R/W Description Default Reference