Datasheet

KSZ8873MLL/FLL/RLL

DS00002348A-page 38  2017 Microchip Technology Inc.

4.0 REGISTER DESCRIPTIONS

4.1 MII Management (MIIM) Registers

The MIIM interface is used to access the MII PHY registers defined in this section. The SPI, I

C, and SMI interfaces can

also be used to access some of these registers. The latter three interfaces use a different mapping mechanism than the

MIIM interface.

The “PHYADs” by defaults are assigned “0x1” for PHY1 (port 1) and “0x2” for PHY2 (port 2). Additionally, these “PHY-

ADs” can be programmed to the PHY addresses specified in bits[7:3] of Register 15 (0x0F): Global Control 13.

The “REGAD” supported are 0x0-0x5, 0x1D, and 0x1F.

TABLE 4-1: MIIM REGISTERS FOR KSZ8873MLL/FLL/RLL

PHYAD = 0x1, REGAD = 0x0 PHY1 Basic Control Register

PHYAD = 0x1, REGAD = 0x1 PHY1 Basic Status Register

PHYAD = 0x1, REGAD = 0x2 PHY1 Physical Identifier I

PHYAD = 0x1, REGAD = 0x3 PHY1 Physical Identifier II

PHYAD = 0x1, REGAD = 0x4 PHY1 Auto-Negotiation Advertisement Register

PHYAD = 0x1, REGAD = 0x5 PHY1 Auto-Negotiation Link Partner Ability Register

PHYAD = 0x1, 0x6 – 0x1C PHY1 Not supported

PHYAD = 0x1, 0x1D PHY1 Not supported

PHYAD = 0x1, 0x1E PHY1 Not supported

PHYAD = 0x1, 0x1F PHY1 Special Control/Status

PHYAD = 0x2, REGAD = 0x0 PHY2 Basic Control Register

PHYAD = 0x2, REGAD = 0x1 PHY2 Basic Status Register

PHYAD = 0x2, REGAD = 0x2 PHY2 Physical Identifier I

PHYAD = 0x2, REGAD = 0x3 PHY2 Physical Identifier II

PHYAD = 0x2, REGAD = 0x4 PHY2 Auto-Negotiation Advertisement Register

PHYAD = 0x2, REGAD = 0x5 PHY2 Auto-Negotiation Link Partner Ability Register

PHYAD = 0x2, 0x6 – 0x1C PHY2 Not supported

PHYAD = 0x2, 0x1D PHY2 LinkMD Control/Status

PHYAD = 0x2, 0x1E PHY2 Not supported

PHYAD = 0x2, 0x1F PHY2 Special Control/Status