Datasheet

KSZ8873MLL/FLL/RLL
DS00002348A-page 44  2017 Microchip Technology Inc.
4
IEEE 802.3x
Receive Direction
Flow Control Enable
R/W
1 = will enable receive direction flow control feature.
0 = will not enable receive direction flow control fea-
ture. Switch will not react to any flow control (PAUSE)
frame it receives.
1
3
Frame Length Field
Check
R/W
1 = will check frame length field in the IEEE packets. If
the actual length does not match, the packet will be
dropped (for Length/Type field < 1500).
0 = will not check
0
2 Aging Enable R/W
1 = enable age function in the chip
0 = disable age function in the chip
1
1 Fast Age Enable R/W 1 = turn on fast age (800 µs) 0
0
Aggressive Back-Off
Enable
R/W
1 = enable more aggressive back off algorithm in half-
duplex mode to enhance performance. This is not an
IEEE standard.
0
Register 4 (0x04): Global Control 2
7
Unicast Port-VLAN
Mismatch Discard
R/W
This feature is used with port-VLAN (described in reg.
17, reg. 33, etc.)
1 = all packets cannot cross VLAN boundary
0 = unicast packets (excluding unkown/multicast/
broadcast) can cross VLAN boundary
Note: Port mirroring is not supported if this bit is set to
“0”.
1
6
Multicast Storm
Protection Disable
R/W
1 = Broadcast Storm Protection does not include
multicast packets. Only DA = FF-FF-FF-FF-FF-FF
packets will be regulated.
0 = Broadcast Storm Protection includes DA = FF-FF-
FF-FF-FF-FF and DA[40] = 1 packets.
1
5 Back Pressure Mode R/W
1 = carrier sense based back pressure is selected
0 = collision based back pressure is selected
1
4
Flow Control and
Back Pressure Fair
Mode
R/W
1 = Fair mode is selected. In this mode, if a flow con-
trol port and a non-flow control port talk to the same
destination port, packets from the non-flow control
port may be dropped. This is to prevent the flow con-
trol port from being flow controlled for an extended
period of time.
0 = In this mode, if a flow control port and a non-flow
control port talk to the same destination port, the flow
control port will be flow controlled. This may not be
“fair” to the flow control port.
1
3
No Excessive
Collision Drop
R/W
1 = the switch will not drop packets when 16 or more
collisions occur.
0 = the switch will drop packets when 16 or more colli-
sions occur.
0
2
Huge Packet
Support
R/W
1 = will accept packet sizes up to 1916 bytes (inclu-
sive). This bit setting will override setting from bit 1 of
this register.
0 = the max packet size will be determined by bit 1 of
this register.
0
1
Legal Maximum
Packet Size Check
Enable
R/W
0 = will accept packet sizes up to 1536 bytes (inclu-
sive).
1 = 1522 bytes for tagged packets, 1518 bytes for
untagged packets. Any packets larger than the speci-
fied value will be dropped.
0
TABLE 4-6: GLOBAL REGISTERS (0-15) (CONTINUED)
Bit Name R/W Description Default