Datasheet

KSZ8873MLL/FLL/RLL
DS00002348A-page 34  2017 Microchip Technology Inc.
The following is a sample procedure for programming the KSZ8873MLL/FLL/RLL using the SPI bus:
1. At the board level, connect the KSZ8873MLL/FLL/RLL pins as follows:
2. Enable SPI slave mode by setting the KSZ8873MLL/FLL/RLL strap-in pins P2LED[1:0] to “10”.
3. Power up the board and assert reset to the KSZ8873MLL/FLL/RLL.
4. Configure the desired register settings in the KSZ8873MLL/FLL/RLL, using the SPI write or multiple write com-
mand.
5. Read back and verify the register settings in the KSZ8873MLL/FLL/RLL, using the SPI read or multiple read com-
mand.
Some of the configuration settings, such as “Aging Enable,” “Auto Negotiation Enable,” “Force Speed,” and “Power
Down” can be programmed after the switch has been started.
The following four figures illustrate the SPI data cycles for “Write,” “Read,” “Multiple Write,” and “Multiple Read.” The
read data is registered out of SPIQ on the falling edge of SPIC, and the data input on SPID is registered on the rising
edge of SPIC.
TABLE 3-14: SPI CONNECTIONS
Pin Number Signal Name
External Processor Signal
Description
40 SPISN SPI Slave Select
42 SCL (SPIC) SPI Clock
43 SDA (SPID) SPI Data
(Master output; Slave input)
39 SPIQ SPI Data
(Master input; Slave output)
FIGURE 3-9: SPI WRITE DATA CYCLE
SPIQ
SPIC
SPID
SPIS_N
00000010X A7 A6 A5 A4 A3 A2 A1
A0
WRITE COMMAND WRITE ADDRESS WRITE DATA
D2 D0D1D3D4D5D6D7