Datasheet

KSZ8863MLL/FLL/RLL
DS00002335B-page 80  2017 Microchip Technology Inc.
7.6 SPI Timing
FIGURE 7-13: SPI INPUT TIMING
FIGURE 7-14: SPI OUTPUT TIMING
TABLE 7-6: SPI TIMING PARAMETERS
Parameter Description Min. Typ. Max. Units
f
SCLK
SPI_SCLK Clock Frequency — — 25 MHz
t
1
SPI_CSN active setup time 16 — — ns
t
2
SDA (SPID) data input setup time 5 — — ns
t
3
SDA (SPID) data input hold time 6 — — ns
t
4
SPI_CSN active hold time 16 — — ns
t
5
SPI_CSN disable high time 16 — — ns
t
6
SPI_SCLK falling edge to SPIQ (SDO) data output valid 4 — 15 ns
t
7
SPI_CSN inactive to SPIQ (SDO) data output invalid 2 — — ns