Datasheet

KSZ8795CLX
DS00002112B-page 66  2016-2017 Microchip Technology Inc.
The named indirect byte registers is a direct register which is used for PME/ACL/EEE Indirect Register access only. The
Indirect Byte Register 160 (0XA0) is used for read/write to all PME, EEE, and ACL indirect registers.
Register 117 (0x75): Indirect Data Register 3
7 - 0 Indirect Data
[31:24]
Bits[31:24] of indirect data R/W 00000000
Register 118 (0x76): Indirect Data Register 2
7 - 0 Indirect Data
[23:6]
Bits[23:16] of indirect data. R/W 00000000
Register 119 (0x77): Indirect Data Register 1
7 - 0 Indirect Data
[15:8]
Bits[15:8] of indirect data. R/W 00000000
Register 120 (0x78): Indirect Data Register 0
7 - 0 Indirect Data
[7:0]
Bits[7:0] of indirect data. R/W 00000000
TABLE 4-8: ADVANCED CONTROL REGISTERS 160, 124 - 127
Address Name Description Mode Default
Register 160 (0xA0): Indirect Byte Register (for PME, EEE, and ACL Registers)
7 - 0 Indirect
Byte[7:0]
Byte data of indirect access. R/W 00000000
Register 124 (0x7C): Interrupt Status Register
7 - 5 Reserved N/A Don’t Change. RO 000
4PME
Interrupt
Status
1 = PME interrupt request
0 = Normal
Note: This bit reflects PME control registers,
write to PME Control Register to clear
This bit is set when PME is asserted. Write a “1” to
clear this bit (WC)
RO 0
3 Port 4
Interrupt
Status
1 = Port 4 interrupt request
0 = Normal
Note: This bit is set by Port 4 link change.
Write a “1” to clear this bit (WC)
R/WC 0
2 Port 3
Interrupt
Status
1 = Port 3 interrupt request
0 = Normal
Note: This bit is set by a link change on Port
3. Write a “1” to clear this bit (WC)
R/WC 0
1 Port 2
Interrupt
Status
1 = Port 2 interrupt request
0 = Normal
Note: This bit is set by a link change on Port
2. Write a “1” to clear this bit (WC)
R/WC 0
0 Port 1
Interrupt
Status
1 = Port 1 interrupt request
0 = Normal
Note: This bit is set by link change on Port 1.
Write a “1” to clear this bit (WC)
R/WC 0
TABLE 4-7: ADVANCED CONTROL REGISTERS 112 - 120 (CONTINUED)
Address Name Description Mode Default