Datasheet
2016-2017 Microchip Technology Inc. DS00002112B-page 49
KSZ8795CLX
0xBF Reserved (Factory Testing Register): Transmit Queue Remap Base Register
0xC0-0xCE Port 2 Control Registers
0xCF Reserved (Factory Testing Register)
0xD0-0xDE Port 3 Control Registers
0xDF Reserved (Factory Testing Register)
0xE0-0xEE Port 4 Control Registers
0xEF Reserved (Factory Testing Register)
0xF0-0xFE Port 5 Control Registers
0xFF Reserved (Factory Testing Register)
TABLE 4-3: GLOBAL REGISTERS
Address Name Description Mode Default
Register 0 (0x00): Chip ID0
7 0 Family ID Chip family. RO 0x87
Register 1 (0x01): Chip ID1/Start Switch
7 4 Chip ID 0x9 = 8795 RO 0x9
3 1 Revision ID — RO 0x0
0 Start Switch 1 = Start the switch function of the chip.
0 = Stop the switch function of the chip.
R/W 1
Register 2 (0x02): Global Control 0
7 New Back-Off Enable New Back-off algorithm designed for UNH
1 = Enable
0 = Disable
R/W 0
6 Global Soft Reset Enable Global Software Reset
1 = Enable to reset all FSM and data path (not con-
figuration).
0 = Disable reset.
Note: This reset will stop to receive packets if
it is being in the traffic. All registers keep
their configuration values.
R/W 0
5 Flush Dynamic MAC
Table
Flush the entire dynamic MAC table for RSTP. This
bit is self- clear (SC).
1 = Trigger the flush dynamic MAC table operation.
0 = Normal operation.
Note: All the entries associated with a port
that has its learning capability being
turned off (learning disable) will be
flushed. If you want to flush the entire
table, all ports learning capability must
be turned off.
R/W
(SC)
0
TABLE 4-2: DIRECT REGISTERS (CONTINUED)
Address Contents