Datasheet

KSZ8795CLX
DS00002112B-page 38  2016-2017 Microchip Technology Inc.
3.6.5 IGMP SUPPORT
There are two components involved with the support of the Internet group management protocol (IGMP) in Layer 2. The
first part is IGMP snooping, the second part is this IGMP packet which is sent back to the subscribed port. Those com-
ponents are as follows.
3.6.5.1 IGMP Snooping
The KSZ8795CLX traps IGMP packets and forwards them only to the processor (Port 5 SW5-RGMII/MII/RMII). The
IGMP packets are identified as IP packets (either Ethernet IP packets, or IEEE 802.3 SNAP IP packets) with IP version
= 0x4 and protocol version number = 0x2. Set Register 5 Bit[6] to ‘1’ to enable IGMP snooping.
3.6.5.2 IGMP Send Back to the Subscribed Port
Once the host responds to the received IGMP packet, the host should know the original IGMP ingress port and send
back the IGMP packet to this port only, to avoid this IGMP packet being broadcast to all ports which will downgrade the
performance.
With the tail tag mode enabled, the host will know the port which IGMP packet has been received from tail tag bits [1:0]
and can send back the response IGMP packet to this subscribed port by setting bits [3:0] in the tail tag. Enable tail tag
mode by setting Register 12 Bit[1].
3.6.6 IPV6 MLD SNOOPING
The KSZ8795CLX traps IPv6 multicast listener discovery (MLD) packets and forwards them only to the processor
(Port 5). MLD snooping is controlled by Register 164 Bit[2] (MLD snooping enable) and Register 164 Bit[3] (MLD option).
With MLD snooping enabled, the KSZ8795CLX traps packets that meet all of the following conditions:
• IPv6 multicast packets
• Hop count limit = 1
• IPv6 next header = 1 or 58 (or = 0 with hop-by-hop next header = 1 or 58) If the MLD option bit is set to “1”, the
KSZ8795CLX traps packets with the following additional condition:
- IPv6 next header = 43, 44, 50, 51, or 60 (or = 0 with hop-by-hop next header = 43, 44, 50, 51, or 60)
TABLE 3-15: TAIL TAG RULES
Ingress to Port 5 (Host to KSZ8795CLX)
Bits[3:0] Destination
0,0,0,0 Reserved
0,0,0,1 Port 1 (Direct forward to Port 1)
0,0,1,0 Port 2 (Direct forward to Port 2)
0,1,0,0 Port 3 (Direct forward to Port 3)
1,0,0,0 Port 4 (Direct forward to Port 4)
1,1,1,1 Port 1, 2, 3, and 4 (direct forward to Port 1, 2, 3, 4)
Bits[7:4] —
0,0,0,0 Queue 0 is used at destination port
0,0,0,1 Queue 1 is used at destination port
0,0,1,0 Queue 2 is used at destination port
0,0,1,1 Queue 3 is used at destination port
0,1,x,x Anyhow send packets to specified port in Bits[3:0]
1,x,x,x Bits[6:0] will be ignored as normal (address look-up)
Egress from Port 5 (KSZ8795CLX to Host)
Bits[1:0]
Source
0,0 Port 1 (Packets from Port 1)
0,1 Port 2 (Packets from Port 2)
1,0 Port 3 (Packets from Port 3)
1,1 Port 4 (Packets from Port 4)