Datasheet
2016-2017 Microchip Technology Inc. DS00002112B-page 23
KSZ8795CLX
3.4.4 PORT-BASED POWER-DOWN MODE
In addition, the KSZ8795CLX features a per-port power down mode. To save power, a PHY port that is not in use can
be powered down via the Port Control 10 Register Bit[3], or MIIM PHY Register 0 Bit[11].
3.4.5 ENERGY EFFICIENT ETHERNET (EEE)
Along with supporting different types of power saving modes (H/W power down, S/W power down, and energy detect
mode), the KSZ8795CLX extends the green function capability by supporting Energy Efficient Ethernet (EEE) features
defined in IEEE P802.3az, March 2010. Both 10BASE-T and 100BASE-TX EEE functions are supported in KSZ8795-
CLX. In 100BASE-TX the EEE operation is asymmetric on the same link, which means one direction could be at low-
power idle (LPI) state, in the meanwhile, another direction could exist packet transfer activity. Different from other type
of power saving mode, EEE is able to maintain the link while power saving is achieved. Based on EEE specification, the
energy saving from EEE is done at PHY level. KSZ8795CLX reduces the power consumption not only at PHY level but
also at MAC and switch level by shutting down the unused clocks as much as possible when the device is at low-power
idle phase.
The KSZ8795CLX supports the 802.3az IEEE standard for both 10 Mbps and 100 Mbps interfaces. The EEE capability
combines Switch, MAC, and PHY to support operation in the LPI mode. When the LPI mode is enabled, systems on
both sides of the link can save power during periods of low link utilization.
EEE implementation provides a protocol to coordinate transitions to or from lower power consumption without changing
the link status and without dropping or corrupting frames. The transition time into and out of the lower power consump-
tion is kept small enough to be transparent to upper layer protocols and applications. EEE specifies means to exchange
capabilities between link partners to determine whether EEE is supported and to select the best set of parameters com-
mon to both sides.
Besides supporting the 100BASE-TX PHY EEE, KSZ8795CLX also supports 10BASE-T with reduced transmit ampli-
tude requirements for 10 Mbps mode to allow a reduction in power consumption.
FIGURE 3-5: IEEE TRANSMIT AND RECEIVE SIGNALING PATHS
Idle
Quite
TRANSMIT PATH
SWITCH
ISSUE OR
TERMINATE LPI
REQUEST
MAP LPI REQUEST TO
LPI MII PATTERN
PCS
(PHY LAYER)
IDLE/DATA
WAKEUP
QUIET/SLEEP
QUIET
SLEEP/REFRESH
QUIET
SLEEP
IDLE
DATA
MAC
RECEIVE PATH
CONTROL/STATUS
SIGNALS
LPI STATUS
SIGNALS
MAP LPI/P/ AND QUIET
STATE TO LPI MII
PATTERN
Idle
Quite
PCS
(PHY LAYER)
IDLE/DATA
WAKEUP
QUIET/SLEEP
QUIET
SLEEP/REFRESH
QUIET
SLEEP
IDLE
DATA
MAC
CLOCK CONTROL
STATUS REGISTER
TEST CONTROL