Datasheet

 2018 Microchip Technology Inc. DS00002813A-page 7
KSZ8721BL/SL
19 TXD2 IPD MII Transmit Data Input.
20 TXD3 IPD MII Transmit Data Input.
21 COL/RMII IPD/O
MII Collision Detect Output.
During reset, the pull-up/pull-down value is latched as RMII select.
See
Tabl e 2- 2
for details.
22 CRS/RMII_BTB IPD/O
MII Carrier Sense Output.
During reset, the pull-up/pull-down value is latched as RMII back-
to-back mode when RMII mode is selected. See
Tab l e 2-2
for
details.
23 GND GND Ground.
24
VDDIO P
Digital IO 2.5/3.3V tolerant power supply. 3.3V power input of volt-
age regulator. See
Section 3.23, Circuit Design Reference for
Power Supply
for details.
25 INT#/PHYAD0 IPU/O
Management Interface (MII) Interrupt Out. Interrupt level set by
Register 1f, bit 9. During reset, latched as PHYAD[0]. See
Tab l e 2-
2
for details.
26 LED0/TEST IPU/O
Link/Activity LED Output. The external pull-down enable test
mode and only used for the factory test. Active low.
Link/Act Pin State LED Definition PHYAD0
No Link H Off
Link L On
Act — Toggle
27
LED1/SPD100/
nFEF
IPU/O
Speed LED Output. Latched as SPEED (Register 0, bit 13) during
power-up/ reset. See
Tabl e 2-2
for details. Active low.
Speed Pin State LED Definition
10BT H Off
100BT L On
28 LED2 IPU/O
Full-duplex LED Output. Latched as DUPLEX (register 0h, bit 8)
during power-up/ reset. See “
Tab l e 2-2
for details. Active low.
Duplex Pin State LED Definition
Half H Off
Full L On
29 LED3/NWAYEN IPU/O
Collision LED Output. Latched as ANEG_EN (register 0h, bit 12)
during power-up/ reset. See
Tab l e 2-2
for details.
Collision Pin State LED Definition
No Collision H Off
Collision L On
TABLE 2-1: PIN DESCRIPTION (CONTINUED)
Pin
Number
Pin Name
Type
(Note 2-1)
Description