Datasheet

Micrel, Inc. KS8721BL/SL
June 2009
31
M9999-062509-1.3
Figure 9. Reset Timing
Symbol Parameter Min Typ Max Units
t
sr
Stable Supply Voltages to Reset High 50 µs
Table 8. Reset Timing Parameters
Reset Circuit Diagram
Micrel recommends the following discrete reset circuit as shown in Figure 10 when powering up the KS8721BL/SL device.
For the application where the reset circuit signal comes from another device (e.g., CPU, FPGA, etc), we recommend the
reset circuit as shown in Figure 11.
VCC
R
10k
D2
C
10µF
D1
CPU/FPGA
RST_OUT_n
KS8721BL/SL
RST
D1, D2: 1N4148
Figure 10. Recommended Reset Circuit