Datasheet

 2016-2018 Microchip Technology Inc. DS00002202C-page 53
KSZ8081MNX/RNB
7.8 MDC/MDIO Timing
FIGURE 7-9: MDC/MDIO TIMING
TABLE 7-8: AUTO-NEGOTIATION FAST LINK PULSE (FLP) TIMING PARAMETERS
Timing Parameter Description Min. Typ. Max. Units
t
BTB
FLP burst to FLP burst 8 16 24 ms
t
FLPW
FLP burst width — 2 — ms
t
PW
Clock/Data pulse width — 100 — ns
t
CTD
Clock pulse to data pulse 55.5 64 69.5 µs
t
CTC
Clock pulse to clock pulse 111 128 139 µs
—
Number of clock/data pulses per
FLP burst
17 — 33 —
TABLE 7-9: MDC/MDIO TIMING PARAMETERS
Timing
Parameter
Description Min. Typ. Max. Units
fc MDC Clock Frequency — 2.5 10 MHz
t
P
MDC period
—
400
—
ns
t
MD1
MDIO (PHY input) setup to rising edge of MDC 10
— —
ns
t
MD2
MDIO (PHY input) hold from rising edge of MDC 4
— —
ns
t
MD3
MDIO (PHY output) delay from rising edge of MDC 5 222
—
ns
t
MD1
VALID
DATA
MDIO
(PHY INPUT)
VALID
DATA
MDC
t
MD2
MDIO
(PHY OUTPUT)
VALID
DATA
t
MD3
t
P