Datasheet

KSZ8081MNX/RNB
DS00002202C-page 50  2016-2018 Microchip Technology Inc.
7.4 MII Transmit Timing (BASE100BASE-TX)
FIGURE 7-4: MII TRANSMIT TIMING (BASE100BASE-TX)
7.5 MII Receive Timing (BASE100BASE-TX)
FIGURE 7-5: MII RECEIVE TIMING (BASE100BASE-TX)
TABLE 7-4: MII TRANSMIT TIMING (BASE100BASE-TX) PARAMETERS
Timing
Parameter
Description Min. Typ. Max. Units
t
P
TXC Period — 40 — ns
t
WL
TXC pulse width low
—
20
—
ns
t
WH
TXC pulse width high
—
20
—
ns
t
SU1
TXD[3:0] setup to rising edge of TXC 10
— —
ns
t
SU2
TXEN setup to rising edge of TXC 10
— —
ns
t
HD1
TXD[3:0] hold from rising edge of TXC 0
— —
ns
t
HD2
TXEN hold from rising edge of TXC 0
— —
ns
t
CRS1
TXEN high to CRS asserted latency
—
72
—
ns
t
CRS2
TXEN low to CRS de-asserted latency
—
72
—S
ns
CRS
TXEN
TXD[3:0]
TXC
t
CRS1
t
WL
t
P
t
HD1
t
SU1
t
CRS2
DATA
IN
t
WH
t
HD2
t
SU2
CRS
RXDV
RXD[3:0]
RXER
RXC
t
OD
t
P
t
WL
t
WH
t
RLAT