Datasheet
2016-2018 Microchip Technology Inc. DS00002202C-page 5
KSZ8081MNX/RNB
2.0 PIN DESCRIPTION AND CONFIGURATION
FIGURE 2-1: KSZ8081MNX 32-QFN PIN ASSIGNMENT (TOP VIEW)
TABLE 2-1: PIN DESCRIPTION — KSZ8081MNX
Pin
Number
Name
Buffer
Type
(
Note 2-1)
Description
1 GND GND Ground
2 VDD_1.2 P
1.2V core V
DD
(power supplied by KSZ8081MNX). Decouple with
2.2 µF and 0.1 µF capacitors to ground.
3 VDDA_3.3 P 3.3V analog V
DD
.
4 RXM I/O Physical receive or transmit signal ( differential).
5 RXP I/O Physical receive or transmit signal (+ differential).
6 TXM I/O Physical transmit or receive signal ( differential).
7 TXP I/O Physical transmit or receive signal (+ differential).
GND
VDD_1.2
VDDA_3.3
RXM
RXP
TXM
TXP
XO
RXD3/PHYAD0
MDC
MDIO
REXT
XI
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
1
2
3
4
5
6
7
8
9101112131415
16
24
23
22
21
20
19
18
17
32 31 30 29 28 27 26
25
TXD0
TXEN
TXC
INTRP/NAND_TREE#
RXER/ISO
RXC/B-CAST_OFF
RXDV/CONFIG2
VDDIO
COL/CONFIG0
CRS/CONFIG1
LED0/NWAYEN
LED1/SPEED
RST#
TXD3
TXD2
TXD1
PADDLE
GROUND
(ON BOTTOM OF CHIP)