Datasheet

KSZ8081MNX/RNB
DS00002202C-page 46 2016-2018 Microchip Technology Inc.
6.0 ELECTRICAL CHARACTERISTICS
Symbol Parameter Condition Min. Typ. Max. Units
Supply Current (V
DDIO
, V
DDA_3.3
= 3.3V)
I
DD1_3.3V
10BASE-T
Full-duplex traffic @ 100%
utilization
41
mA
I
DD2_3.3V
100BASE-TX
Full-duplex traffic @ 100%
utilization
47
mA
I
DD3_3.3V
EDPD Mode
Ethernet cable disconnected
(reg. 18h.11 = 0)
20
mA
I
DD4_3.3V
Power-Down Mode
Software power-down (reg.
0h.11 = 1)
4
mA
CMOS Level Inputs
V
IH
Input High Voltage
V
DDIO
= 3.3V 2.0
VV
DDIO
= 2.5V 1.8
V
DDIO
= 1.8V 1.3
V
IL
Input Low Voltage
V
DDIO
= 3.3V
0.8
VV
DDIO
= 2.5V
0.7
V
DDIO
= 1.8V
0.5
|I
IN
| Input Current V
IN
= GND ~ VDDIO
10 µA
CMOS Level Outputs
V
OH
Output High Voltage
V
DDIO
= 3.3V 2.4
VV
DDIO
= 2.5V 2.0
V
DDIO
= 1.8V 1.5
V
OL
Output Low Voltage
V
DDIO
= 3.3V
0.4
VV
DDIO
= 2.5V
0.4
V
DDIO
= 1.8V
0.3
|I
oz
| Output Tri-State Leakage
10 µA
LED Output
I
LED
Output Drive Current Each LED pin (LED0, LED1) 8 mA
All Pull-Up/Pull-Down Pins (including Strapping Pins)
pu Internal Pull-Up Resistance
V
DDIO
= 3.3V
30 45 73
k
V
DDIO
= 2.5V
39 61 102
V
DDIO
= 1.8V
48 99 178
pd
Internal Pull-Down
Resistance
V
DDIO
= 3.3V
26 43 79
k
V
DDIO
= 2.5V
34 59 113
V
DDIO
= 1.8V
53 99 200
100BASE-TX Transmit (measured differentially after 1:1 transformer)
V
O
Peak Differential Output Volt-
age
100 termination across dif-
ferential output
0.95 1.05 V
V
IMB
Output Voltage Imbalance
100 termination across dif-
ferential output
2 %
t
r
, t
f
Rise/Fall Time 3 5 ns
Rise/Fall Time Imbalance 0 0.5 ns
Duty Cycle Distortion ±0.25 ns
Overshoot 5 %
Output Jitter Peak-to-peak 0.7 ns