Datasheet

KSZ8081MNX/RNB
DS00002202C-page 40  2016-2018 Microchip Technology Inc.
11.5
Slow-Oscilla-
tor Mode
Enable
Slow-oscillator mode is used to 
disconnect the input reference 
crystal/clock on the XI pin and select
the on-chip slow oscillator when the
KSZ8081MNX/RNB device is not in
use after power-up.
1 = Enable
0 = Disable
This bit automatically sets software
power-down to the analog side when
enabled.
RW 0
11.4:0 Reserved Reserved RW 0_0000
Register 15h – RXER Counter
15.15:0
RXER
Counter
Receive error counter for symbol
error frames
RO/SC 0000h
Register 16h – Operation Mode Strap Override
16.15
Reserved
Factory Mode
0 = Normal operation
1 = Factory test mode
If TXC (Pin 22) latches in a pull-up
value at the de-assertion of reset,
write a ‘0’ to this bit to clear
Reserved Factory Mode.

This bit applies only to
KSZ8081MNX.
RW
0
Set by the pull-up/pull-down
value of TXC (Pin 22).
16.14:11 Reserved Reserved RW 000_0
16.10 Reserved Reserved RO 0
16.9
B-CAST_OFF
Override
1 = Override strap-in for B-
CAST_OFF
If bit is ‘1’, PHY Address 0 is non-
broadcast.
RW 0
16.8 Reserved Reserved RW 0
16.7
MII B-to-B
Override
1 = Override strap-in for MII back-to-
back mode (also set Bit 0 of this reg
-
ister to ‘1’)
This bit applies only to
KSZ8081MNX.
RW 0
16.6
RMII B-to-B
Override
1 = Override strap-in for RMII Back-
to-Back mode (also set Bit 1 of this
register to ‘1’)
This bit applies only to
KSZ8081RNB.
RW 0
16.5
NAND Tree
Override
1 = Override strap-in for NAND tree
mode
RW 0
16.4:2 Reserved Reserved RW 0_00
16.1 RMII Override
1 = Override strap-in for RMII mode
This bit applies only to
KSZ8081RNB.
RW 0
16.0 MII Override
1 = Override strap-in for MII mode
This bit applies only to
KSZ8081MNX.
RW 1
TABLE 4-2: REGISTER DESCRIPTION (CONTINUED)
Address Name Description Mode Default