Datasheet

 2016-2018 Microchip Technology Inc. DS00002202C-page 35
KSZ8081MNX/RNB
4.2 Register Description
TABLE 4-2: REGISTER DESCRIPTION
Address Name Description Mode Default
Register 0h – Basic Control
0.15 Reset
1 = Software reset
0 = Normal operation
This bit is self-cleared after a ‘1’ is
written to it.
RW/SC
0
0.14 Loopback
1 = Loopback mode
0 = Normal operation
RW
0
0.13 Speed Select
1 = 100 Mbps
0 = 10 Mbps
This bit is ignored if auto-
negotiation is enabled (Register
0.12 = 1).
RW
Set by the SPEED strapping pin.
See the Strap-In Options –
KSZ8081MNX section for details.
0.12
Auto-
Negotiation
Enable
1 = Enable auto-negotiation
process
0 = Disable auto-negotiation
process
If enabled, the auto-negotiation
result overrides the settings in
registers 0.13 and 0.8.
RW
Set by the NWAYEN strapping
pin.
See the Strap-In Options –
KSZ8081MNX section for details.
0.11 Power-Down
1 = Power-down mode
0 = Normal operation
If software reset (Register 0.15) is
used to exit power-down mode
(Register 0.11 = 1), two software
reset writes (Register 0.15 = 1) are
required. The first write clears
power-down mode; the second
write resets the chip and re-latches
the pin strapping pin values.
RW
0
0.10 Isolate
1 = Electrical isolation of PHY from
MII/RMII
0 = Normal operation
RW
Set by the ISO strapping pin.
See the Strap-In Options –
KSZ8081MNX section for details.
0.9
Restart Auto-
Negotiation
1 = Restart auto-negotiation
process
0 = Normal operation.
This bit is self-cleared after a ‘1’ is
written to it.
RW/SC
0
0.8 Duplex Mode
1 = Full-duplex
0 = Half-duplex
RW
The inverse of the DUPLEX
strapping pin value.
See the Strap-In Options –
KSZ8081MNX section for details.
0.7 Collision Test
1 = Enable COL test
0 = Disable COL test
RW
0
0.6:0 Reserved Reserved RO
000_0000