Datasheet

Micrel, Inc.
KSZ8081MNX/KSZ8081RNB
August
19, 2015 36
Revision 1.4
Table 8. NAND Tree Test Pin Order for KSZ8081RNB
Pin Number Pin Name NAND Tree Description
11 MDIO Input
12 MDC Input
15 RXD1 Input
16 RXD0 Input
18 CRS_DV Input
19 REF_CLK Input
21 INTRP Input
23 TXEN Input
31 LED1 Input
30 LED0 Input
24 TXD0 Input
25 TXD1 Output
NAND Tree I/O Testing
Use the following procedure to check for faults on the KSZ8081MNX/RNB digital I/O pin connections to the board:
1. Enable NAND tree mode using either hardware (NAND_Tree#, Pin 21) or software (Register 16h, Bit [5]).
2. Use board logic to drive all KSZ8081MNX/RNB NAND tree input pins high.
3. Use board logic to drive each NAND tree input pin, in KSZ8081MNX/RNB NAND tree pin order, as follows:
a. Toggle the first pin (MDIO) from high to low, and verify that the TXD1 pin switches from high to low to indicate that
the first pin is connected properly.
b. Leave the first pin (MDIO) low.
c. Toggle the second pin (MDC) from high to low, and verify that the TXD1 pin switches from low to high to indicate
that the second pin is connected properly.
d. Leave the first pin (MDIO) and the second pin (MDC) low.
e. Continue with this sequence until all KSZ8081MNX/RNB NAND tree input pins have been toggled.
Each KSZ8081MNX/RNB NAND tree input pin must cause the TXD1 output pin to toggle high-to-low or low-to-high to
indicate a good connection. If the TXD1 pin fails to toggle when the KSZ8081MNX/RNB input pin toggles from high to low,
the input pin has a fault.