Datasheet

Micrel, Inc.
KSZ8081MNX/KSZ8081RNB
August
19, 2015 15
Revision 1.4
Pin Description – KSZ8081RNB
Pin Number Pin Name Type
(6)
Pin Function
1 GND GND Ground
2 VDD_1.2 P
1.2V core V
DD
(power supplied by KSZ8081RNB)
.
Decouple with 2.2µF and 0.1µF
capacitors to ground.
3 VDDA_3.3 P 3.3V analog V
DD
.
4 RXM I/O
Physical receive or transmit signal (− differential).
5 RXP I/O Physical receive or transmit signal (+ differential).
6 TXM I/O
Physical transmit or receive signal (− differential).
7 TXP I/O Physical transmit or receive signal (+ differential).
8 XO O
Crystal feedback for 25MHz crystal. This pin is a no connect if an oscillator or external
clock source is used.
9 XI I
25MHz Mode: 25MHz ±50ppm Crystal / Oscillator / External Clock Input
50MHz Mode: 50MHz ±50ppm Oscillator / External Clock Input
10 REXT I Set PHY transmit output current. Connect a 6.49kΩ resistor to ground on this pin.
11 MDIO Ipu/Opu
Management Interface (MII) Data I/O. This pin has a weak pull-up, is open-drain, and
requires an external 1.0kΩ pull-up resistor.
12 MDC Ipu
Management Interface (MII) Clock Input. This clock pin is synchronous to the MDIO
data pin.
13 PHYAD0 Ipu/O
The pull-up/pull-down value is latched as PHYADDR[0] at the de-assertion of reset.
See the Strapping Options – KSZ8081RNB section for details.
14 PHYAD1 Ipd/O
The pull-up/pull-down value is latched as PHYADDR[1] at the de-assertion of reset.
See the Strapping Options – KSZ8081RNB section for details.
15
RXD1/
PHYAD2
Ipd/O
RMII Mode: RMII Receive Data Output[1]
(
7
)
.
Config Mode: The pull-up/pull-down value is latched as PHYADDR[2] at the de-
assertion of reset.
See the Strapping Options – KSZ8081RNB section for details.
16
RXD0/
DUPLEX
Ipu/O
RMII Mode: RMII Receive Data Output[0]
(
7
)
.
Config Mode: The pull-up/pull-down value is latched as DUPLEX at the de-assertion
of reset.
See the Strapping Options – KSZ8081RNB section for details.
Notes:
6. P = Power supply.
GND = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipu = Input with internal pull-up (see Electrical Characteristics for value).
Ipu/O = Input with internal pull-up (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (see Electrical Characteristics for value) during power-up/reset; output pin otherwise.
Ipu/Opu = Input with internal pull-up (see Electrical Characteristics for value) and output with internal pull-up (see Electrical Characteristics for
value).
NC = Pin is not bonded to the die.
7. RMII RX Mode: The RXD[1:0] bits are synchronous with the 50MHz RMII Reference Clock. For each clock period in which CRS_DV is asserted, two
bits of recovered data are sent by the PHY to the MAC.