Datasheet

KSZ8041TL/FTL/MLL
DS00002436B-page 48  2017 Microchip Technology Inc.
7.5 MII Receive Timing (100BASE-TX)
FIGURE 7-5: MII RECEIVE TIMING (100BASE-TX)
TABLE 7-5: MII RECEIVE TIMING (100BASE-TX) PARAMETERS
Parameter Description Min. Typ. Max. Units
t
P
RXC period — 40 — ns
t
WL
RXC pulse width low — 20 — ns
t
WH
RXC pulse width high — 20 — ns
t
OD
(RXD[3:0], RXER, RXDV) output delay from rising edge of RXC 19 — 25 ns
t
RLAT
CRS to RXDV latency — 140 — ns
CRS to RXD[3:0] latency — 52 — ns
CRS to RXER latency — 60 — ns
t
WL
t
WH
t
P
t
OD
CRS
RXDV
RXD[3:0]
RXER
RXC
t
RLAT