Datasheet

KSZ8041NL/RNL
DS00002245B-page 6  2017 Microchip Technology Inc.
2.0 PIN DESCRIPTION AND CONFIGURATION
2.1 KSZ8041NL Pin Description and Configuration
FIGURE 2-1: KSZ8041NL 32-QFN PIN ASSIGNMENT (TOP VIEW)
TABLE 2-1: KSZ8041NL PIN DESCRIPTION
Pin Number Symbol
Buffer Type
(Note 2-1)
Description
1 GND Gnd Ground
2 VDDPLL_1.8 P
1.8V Analog V
DD
Decouple with 1.0-µF and 0.1-µF capacitors to ground.
3 VDDA_3.3 P 3.3V Analog V
DD
4 RX- I/O Physical receive or transmit signal (- differential)
5 RX+ I/O Physical receive or transmit signal (+ differential)
6 TX- I/O Physical transmit or receive signal (- differential)
GND
VDDPLL_1.8
VDDA_3.3
RX-
RX+
TX-
TX+
XO
RXD3/PHYAD0
MDC
MDIO
REXT
XI/REFCLK
RXD2/PHYAD1
RXD1/RXD[1]/PHYAD2
RXD0/RXD[0]/DUPLEX
1
2
3
4
5
6
7
8
9101112131415
16
24
23
22
21
20
19
18
17
32 31 30 29 28 27 26
25
TXD0/TXD[0]
TXEN/TX_EN
TXC
INTRP
RXER/RX_ER/ISO
RXC
RXDV/CRSDV/CONFIG2
VDDIO_3.3
COL/CONFIG0 CRS/CONFIG1 LED0/NWAYEN LED1/SPEED RST# TXD3 TXD2 TXD1/TXD[1]
Paddle Ground
on bottom of chip