Datasheet

KSZ8041NL/RNL
DS00002245B-page 34  2017 Microchip Technology Inc.
Register 8h – Link Partner Next Page Ability
8.15 Next Page
1 = Additional Next Page(s) will
follow
0 = Last page
RO 0
8.14 Acknowledge
1 = Successful receipt of link
word
0 = No successful receipt of link
word
RO 0
8.13 Message Page
1 = Message page
0 = Unformatted page
RO 0
8.12 Acknowledge2
1 = Able to act on the information
0 = Not able to act on the
information
RO 0
8.11 Toggle
1 = Previous value of transmitted
link code word equal to logic zero
0 = Previous value of transmitted
link code word equal to logic one
RO 0
8.10:0 Message Field — RO 000_0000_0000
Register 14h – MII Control
14.15:8 Reserved — RO 0000_0000
14.7
100BASE-TX Preamble
Restore
1 = Restore received preamble to
MII output (random latency)
0 = Consume 1-byte preamble
before sending frame to MII
output for fixed latency
RW
0 or
1 (if CONFIG[2:0] = 100)
See Ta b le 2-2 and
Table 2-4 for details.
14.6
10BASE-T Preamble
Restore
1 = Restore received preamble to
MII output
0 = Remove all 7-bytes of
preamble before sending frame
(starting with SFD) to MII output
RW 0
14.5:0 Reserved — RO 00_0001
Register 15h – RXER Counter
15.15:0 RXER Counter
Receive error counter for Symbol
Error frames
RO/SC 000h
Register 1Bh – Interrupt Control/Status
1b.15 Jabber Interrupt Enable
1 = Enable Jabber Interrupt
0 = Disable Jabber Interrupt
RW 0
1b.14
Receive Error Interrupt
Enable
1 = Enable Receive Error
Interrupt
0 = Disable Receive Error
Interrupt
RW 0
1b.13
Page Received Interrupt
Enable
1 = Enable Page Received
Interrupt
0 = Disable Page Received
Interrupt
RW 0
1b.12
Parallel Detect Fault Inter-
rupt Enable
1 = Enable Parallel Detect Fault
Interrupt
0 = Disable Parallel Detect Fault
Interrupt
RW 0
TABLE 4-2: REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
(Note 4-1)
Default