Datasheet

 2017 Microchip Technology Inc. DS00002245B-page 15
KSZ8041NL/RNL
Note 2-1 P = Power supply
Gnd = Ground
I = Input
O = Output
I/O = Bi-directional
Opu = Output with internal pull-up (40K ±30%)
Ipu/O = Input with internal pull-up (40K ±30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (40K ±30%) during power-up/reset; output pin otherwise.
Note 2-2 RMII Rx mode: The RXD[1:0] bits are synchronous with REF_CLK. For each clock period in which
CRS_DV is asserted, two bits of recovered data are sent from the PHY.
Note 2-3 RMII Tx mode: The TXD[1:0] bits are synchronous with REF_CLK. For each clock period in which
TX_EN is asserted, two bits of data are received by the PHY from the MAC.