Datasheet

2017 Microchip Technology Inc. DS00002245B-page 13
KSZ8041NL/RNL
11 MDIO I/O
Management Interface (MII) Data I/O
This pin requires an external 4.7-k pull-up resistor.
12 MDC I
Management Interface (MII) Clock Input
This pin is synchronous to the MDIO data interface.
13 PHYAD0 Ipu/O
The pull-up/pull-down value is latched as PHYADDR[0]
during power-up or reset. See Strap-In option –
KSZ8041RNL for details.
14 PHYAD1 Ipd/O
The pull-up/pull-down value is latched as PHYADDR[1]
during power-up or reset. See Strap-In option –
KSZ8041RNL for details.
15
RXD1 /
PHYAD2
Ipd/O
RMII mode: RMII Receive Data Output[1] (Note 2-2)
Config mode: The pull-up/pull-down value is latched as
PHYADDR[2] during power-up or reset. See Strap-In option
– KSZ8041RNL for details.
16
RXD0 /
DUPLEX
Ipu/O
RMII mode: RMII Receive Data Output[0]] (Note 2-2)
Config mode: Latched as DUPLEX (register 0h, bit 8) during
power-up or reset. See Strap-In option – KSZ8041RNL for
details.
17 VDDIO_3.3 P 3.3V Digital V
DD
18
CRSDV /
CONFIG2
Ipd/O
RMII mode: Carrier Sense/Receive Data Valid Output
Config mode: The pull-up/pull-down value is latched as
CONFIG2 during power-up or reset. See Strap-In option –
KSZ8041RNL for details.
19 REF_CLK O
50 MHz Clock Output
This pin provides the 50-MHz RMII reference clock output to
the MAC.
20
RXER /
RX_ER /
ISO
Ipd/O
RMII mode: Receive Error Output.
Config mode: The pull-up/pull-down value is latched as ISO-
LATE during power-up or reset. See Strap-In option –
KSZ8041RNL for details.
21 INTRP Opu
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for pro-
gramming the interrupt conditions and reading the interrupt
status. Register 1Fh bit 9 sets the interrupt output to active
low (default) or active high.
22
NC O
No Connect
23
TX_EN I
RMII Transmit Enable Input
24
TXD0 I
RMII Transmit Data Input[0] (Note 2-3)
25
TXD1 I
RMII Transmit Data Input[1] (Note 2-3)
26
NC I
No Connect
27
NC I
No Connect
28 CONFIG0 Ipd/O
The pull-up/pull-down value is latched as CONFIG0 during
power-up or reset. See Strap-In option – KSZ8041RNL for
details.
29 CONFIG1 Ipd/O
The pull-up/pull-down value is latched as CONFIG1 during
power-up or reset. See Strap-In option – KSZ8041RNL for
details.
TABLE 2-3: KSZ8041RNL PIN DESCRIPTION (CONTINUED)
Pin Number Pin Name Type (Note 2-1) Pin Function