Datasheet

KSZ8041NL/RNL
DS00002245B-page 12  2017 Microchip Technology Inc.
2.3 KSZ8041RNL Pin Description and Configuration
FIGURE 2-2: KSZ8041RNL 32-QFN PIN ASSIGNMENT (TOP VIEW)
TABLE 2-3: KSZ8041RNL PIN DESCRIPTION
Pin Number Pin Name Type (Note 2-1) Pin Function
1 GND Gnd Ground
2 VDDPLL_1.8 P
1.8V Analog V
DD
Decouple with 1.0-µF and 0.1-µF capacitors to ground.
3 VDDA_3.3 P 3.3V Analog V
DD
4 RX- I/O Physical receive or transmit signal (- differential)
5 RX+ I/O Physical receive or transmit signal (+ differential)
6 TX- I/O Physical transmit or receive signal (- differential)
7 TX+ I/O Physical transmit or receive signal (+ differential)
8XO O
Crystal Feedback for 25-MHz Crystal
This pin is a no connect if an oscillator or an external clock
source is used.
9XI I
Crystal/Oscillator/External Clock Input
25 MHz ±50 ppm
10 REXT I/O
Set physical transmit output current.
Connect a 6.49-k resistor in parallel with a 100-pF capaci-
tor to ground on this pin. See KSZ8041RNL reference
schematics.
1
LED0 /
NWAYEN CONFIG1
INTRP
LED1 / SPEED
RX_ER /
ISO
MDIO
MDC
PHYAD0 PHYAD
1
RXD1 /
PHYAD2
RXD0 /
DUPLEX
VDDIO_3.3
CRS_DV /
CONFIG2
REF_CLK
GND
VDDPLL_1.8
VDDA_3.3
RX-
TX-
TX+
XI
REXT
RX+
XO
RST#
TXD0
TX_EN
NC
NC NC TXD1 CONFIG0
2
3
4
5
6
7
8
9 10 11 12
13 14 15 16
17
18
19
20
21
22
23
24
2526272829303132
Paddle
Ground
(on bottom of chip)