Datasheet

 2017 Microchip Technology Inc. DS00002436B-page 9
KSZ8041TL/FTL/MLL
22
RXD1/
RXD[1]/
PHYAD2
Ipd/O
MII Mode: Receive Data Output[1](Note 2-2)
RMII Mode: Receive Data Output[1](Note 2-3)
Config. Mode: The pull-up/pull-down value is latched as PHYADDR[2] during
power-up/reset. See Table 2-2 for details.
23
RXD0/
RXD[0]/
RX
DUPLEX
Ipu/O
MII Mode: Receive Data Output[0](Note 2-2)
RMII Mode: Receive Data Output[0](Note 2-3)
SMII Mode: Receive Data and Control(Note 2-4)
Config. Mode: Latched as DUPLEX (register 0h, bit 8) during power-up/reset.
See Ta b l e 2 - 2 for details.
24 GND GND Ground
25 VDDIO_3.3
P3.3V digital V
DD
26
VDDIO_3.3
P3.3V digital V
DD
27
RXDV/
CRSDV/
CONFIG2
Ipd/O
MII Mode: Receive Data Valid Output
RMII Mode: Carrier Sense/Receive Data Valid Output
Config. Mode: The pull-up/pull-down value is latched as CONFIG2 during
power-up/reset. See Table 2-2 for details.
28 RXC O MII Mode: Receive Clock Output.
29
RXER/
RX_ER/
ISO
Ipd/O
MII Mode: Receive Error Output
RMII Mode: Receive Error Output
Config. Mode: The pull-up/pull-down value is latched as ISOLATE during
power-up/reset. See Table 2-2 for details.
30
GND GND Ground
31 VDD_1.8 P 1.8V digital V
DD
32 INTRP Opu
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for programming the
interrupt conditions and reading the interrupt status. Register 1Fh bit 9 sets
the interrupt output to active-low (default) or active-high.
33 TXC I/O
MII Mode: Transmit Clock Output
MII Back-to-Back Mode: Transmit Clock Input
34
TXEN/
TX_EN
I
MII Mode: Transmit Enable Input
RMII Mode: Transmit Enable Input
35
TXD0/
TXD[0]/
TX
I
MII Mode: Transmit Data Input[0](Note 2-5)
RMII Mode: Transmit Data Input[0](Note 2-6)
SMII Mode: Transmit Data and Control(Note 2-7)
36
TXD1/
TXD[1]/
SYNC
I
MII Mode: Transmit Data Input[1](Note 2-5)
RMII Mode: Transmit Data Input[1](Note 2-6)
SMII Mode: SYNC Clock Input
37
GND GND Ground
38 TXD2 I MII Mode: Transmit Data Input[2](Note 2-5)
39 TXD3 I MII Mode: Transmit Data Input[3](Note 2-5)
TABLE 2-1: SIGNALS FOR KSZ8041TL/FTL (CONTINUED)
Pin
Number
Pin Name
Type
(Note
2-1)
Description