Datasheet

 2017 Microchip Technology Inc. DS00002436B-page 35
KSZ8041TL/FTL/MLL
4.0 REGISTER DESCRIPTIONS
4.1 Register Map
4.2 Register Descriptions
TABLE 4-1: REGISTER MAP
Register Number (Hex) Description
0h Basic Control
1h Basic Status
2h PHY Identifier 1
3h PHY Identifier 2
4h Auto-Negotiation Advertisement
5h Auto-Negotiation Link Partner Ability
6h Auto-Negotiation Expansion
7h Auto-Negotiation Next Page
8h Link Partner Next Page Ability
9h – 13h Reserved
14h MII Control
15h RXER Counter
16h – 1Ah Reserved
1Bh Interrupt Control/Status
1Ch Reserved
1Dh LinkMD
®
Control/Status
1Eh PHY Control 1
1Fh PHY Control 2
TABLE 4-2: REGISTER DESCRIPTIONS
Address Name Description
Mode
Note 4-1
Default
Register 0h – Basic Control
0.15 Reset
1 = Software reset
0 = Normal operation
This bit is self-cleared after a ‘1’ is written to it.
RW/SC 0
0.14 Loopback
1 = Loopback mode
0 = Normal operation
RW 0
0.13
Speed
Select (LSB)
1 = 100 Mbps
0 = 10 Mbps
This bit is ignored if auto-negotiation is enabled
(register 0.12 = 1).
RW
Set by SPEED strap-
ping pin.
See Table 2 - 2 for
details.
0.12
Auto-
Negotiation
Enable
1 = Enable auto-negotiation process
0 = Disable auto-negotiation process
If enabled, auto-negotiation result overrides set-
tings in register 0.13 and 0.8.
RW
Set by NWAYEN strap-
ping pin.
See Table 2 - 2 for
details.
0.11 Power Down
1 = Power down mode
0 = Normal operation
RW 0